• JSTS:Journal of Semiconductor Technology and Science
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• v.15 no.2
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• pp.208-222
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• 2015

For the performance-efficient integration of IPs on an SoC utilizing heterochronous multi-clock domains, we propose a synchronization scheme that causes low latency overhead when data are crossing clock boundaries. The proposed synchronization scheme is composed of a clock predictor and a synchronizer. The clock predictor of a sender clock domain produces a predicted clock that is used in a receiver clock domain to detect possible synchronization failures in advance. When the possible synchronization failures are detected, a synchronizer at the receiver delays data-capture times to avoid the possible synchronization failures. From the simulation of the proposed scheme through SPICE modeling using a Chartered $0.18{\mu}m$ CMOS process, we verified the functionalities and timing behavior of the clock predictor and the synchronizer. The simulation results show that the clock predictor produces a predicted clock before a synchronization failure, and the synchronizer samples data correctly using the predicted clock.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.33 no.2A
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• pp.159-166
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• 2008

In this paper, we proposed an algorithm to solve the problem that can't maintain hop synchronization using only early-late gate tracking loop due to the drift of geo-stationary satellite in frequency hopping satellite communication system. When the signal is transferred to downlink through DRT(Dehop-Rebop Transponder), the problem with synchronization loss is occurred periodically when using only early-late gate tracking loop, because of energy loss in each side portion of hop due to orbital variation of the satellite. To solve this problem, we have developed Anti-Shrink synchronization tracking algorithm which uses the prediction value of transmission timing and the structure of inner-outer gate instead of early-late gate with the ranging information. Through simulations, we showed that the performance of the Anti-Shrink algorithm is better than that of simple inner-outer energy ratio algorithm and similar to that of conventional early-late tracking loop algorithm with ranging information. No synchronization failure in the proposed algorithm was occurred because of less energy loss and robustness without the ranging information.