• Title/Summary/Keyword: ppMMA

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Enhanced Performance of the OLED with Plasma Treated ITO and Plasma Polymerized Methyl Methacrylate Buffer Layer (ITO 플라즈마 표면처리와 ppMMA 버퍼층으로 제작한 OLED의 발광특성)

  • Lim Jae-Sung;Shin Paik-Kvun
    • The Transactions of the Korean Institute of Electrical Engineers C
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    • v.55 no.1
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    • pp.30-33
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    • 2006
  • Transparent indium tin oxide (ITO) anode surface was modified using $O_3$ Plasma and organic ultrathin buffer layers were deposited on the ITO surface using 13.56 MHz RF plasma polymerization technique. The EL efficiency, operating voltage and lifetime of the organic light-emitting device (OLED) were investigated in order to study the effect of the plasma surface treatment and role of plasma polymerized organic ultrathin buffer layer. Poly methylmethacrylate (PMMA) layers were plasma polymerized on the ITO anode as buffer layer between anode and hole transport layer (HTL). The plasma polymerization of the organic ultrathin layer were carried out at a homemade capacitive-coupled RF plasma equipment. N,N'-diphenyl-N,N'(3- methylphenyl)-1,1'-diphenyl-4,4'-diamine (TPD) as HTL, Tris(8-hydroxyquinolinato) Aluminum $(Alq_3)$ as both emitting layer (EML)/electron transport layer (ETL), and aluminum layer as cathode were deposited using thermal evaporation technique. Effects of the plasma surface treatment of ITO and plasma polymerized buffer layers on the OLED performance were discussed.

Operating characteristics of Floating Gate Organic Memory (플로팅 게이트형 유기메모리 동작특성)

  • Lee, Boong-Joo
    • Journal of the Korea Academia-Industrial cooperation Society
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    • v.15 no.8
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    • pp.5213-5218
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    • 2014
  • Organic memory devices were made using the plasma polymerization method. The memory device consisted of ppMMA(plasma polymerization MMA) thin films as the tunneling and insulating layer, and a Au thin film as the memory layer, which was deposited by thermal evaporation. The organic memory operation theory was developed according to the charging and discharging characteristics of floating gate type memory, which would be measured by the hysteresis voltage and memory voltage with the gate voltage values. The I-V characteristics of the fabricated memory device showed a hysteresis voltage of 26 [V] at 60 ~ -60 [V] double sweep measuring conditions. The programming voltage was applied to the gate electrode in accordance with the result of this theory. A programming voltage of 60[V] equated to a memory voltage of 13[V], and 80[V] equated to a memory voltage of 18[V]. The memory voltage of approximately 40 [%]increased with increasing programming voltage. The charge memory layer charging or discharging according to the theory of the memory was verified experimentally.