• 센서학회지
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• 제23권2호
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• pp.87-93
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• 2014

In this paper, we propose a block-based low-power complementary metal oxide semiconductor (CMOS) image sensor (CIS) with a simple pixel structure for power efficiency. This method, which uses an additional computation circuit, makes it possible to reduce the power consumption of the pixel array. In addition, the computation circuit for a block-based CIS is very flexible for various types of pixel structures. The proposed CIS was designed and fabricated using a standard CMOS 0.18 ${\mu}m$ process, and the performance of the fabricated chip was evaluated. From a resultant image, the proposed block-based CIS can calculate a differing contrast in the block and control the operating voltage of the unit blocks. Finally, we confirmed that the power consumption in the proposed CIS with a simple pixel structure can be reduced.

• 한국정보처리학회논문지
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• 제6권11호
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• pp.3140-3149
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• 1999

Skew correction for document images can be using a rotational transformation of pixel coordinates. In this paper we propose a method which corrects the document skew, by an amount of $\theta$ degrees, using block information, where the block is defined as a rectangular area containing adjacent black pixels. Processing speed of the proposed method is faster than that of the method using pixel transformation, since the number of floating-point operations can be reduced significantly. In the proposed method, we rotate only the four corner points of each block, and then identify the pixels inside the block. Two methods for inside pixel identification are proposed; the first method finds two points intersecting the boundary of the rotated block in each row, and determines the pixels between the two intersection points as the inside pixel. The second method finds boundary points based on Bresenham's line drawing algorithm, using fixed-point operation, and fills the region surrounded by these boundaries as black pixels. We have measured the performance of the proposed method by experimenting it with 2,016 images of various English and Korean documents. We have also proven the superiority of our algorithm through performance comparison with respect to existing methods based on pixel transformation.

• KSII Transactions on Internet and Information Systems (TIIS)
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• 제6권9호
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• pp.2351-2369
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• 2012

This paper describes interpolation method of motion field in the Wyner-Ziv video coding (WZVC) based on Expectation-Maximization (EM) algorithm. In the EM algorithm, the estimated motion field distribution is calculated on a block-by-block basis. Each pixel in the block shares similar probability distribution, producing an undesired blocking artefact on the pixel-based motion field. The proposed interpolation techniques are Bicubic and Lanczos which successively use 16 and 32 neighborhood probability distributions of block-based motion field for one pixel in k-by-k block on pixel-based motion field. EM-based WZVC codec updates the estimated probability distribution on block-based motion field, and interpolates it to pixel resolution. This is required to generate higher-quality soft side information (SI) such that the decoding algorithm is able to make syndrome estimation more quickly. Our experiments showed that the proposed interpolation methods have the capability to reduce EM-based WZVC decoding complexity with small increment of bit rate.

• 전기전자학회논문지
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• 제18권3호
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• pp.403-408
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• 2014

본 논문은 Varying Interpolator를 개선하여 다수의 Pixel을 한 번에 처리할 수 있는 Rasterizer 구조를 제안한다. 설계한 Rasterizer의 Varying Interpolator는 한 번에 16 Pixel을 처리 할 수 있으며 최대 64개의 색상을 출력으로 가진다. 또한 Rasterizer의 연산을 행렬연산 및 행렬변환으로 구성하여 연산의 중복성을 줄이고 재사용성을 높여 Rasterizer의 처리 속도를 높였다. 제안하는 구조의 Rasterizer 는 기존의 연구와 비교하여 색상 보간은 11%, Rasterizer 전체 처리 속도는 17% 향상된 성능을 보였다.

• Journal of Information Technology Applications and Management
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• 제10권3호
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• pp.45-54
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• 2003

Security system with web camera remarkably has been developed at an Internet era. Using transmitted images from remote camera, the system can recognize current situation and take a proper action through web. Existing motion detection methods use simply difference image, background image techniques or block matching algorithm which establish initial block by set search area and find similar block. But these methods are difficult to detect exact motion because of useless noise. In this paper, the proposed method is updating changed background image as much as $N{\times}M$pixel mask as time goes on after get a difference between imput image and first background image. And checking image pixel can efficiently detect motion by computing fixed distance pixel instead of operate all pixel.

• 한국멀티미디어학회논문지
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• 제16권4호
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• pp.411-417
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• 2013

In this paper, we proposed a fast detection method of copy-move forgery image based on low frequency coefficients of the DCT coefficients. We proposed a new matching criterion of copy-moved forgery image detection (MCD) using discrete cosine transform. For each $8{\times}8$ pixel block, the DCT transform is calculated. Our algorithm uses low frequency four (DC, 3 AC coefficient) and six coefficients (DC, 5 AC coefficients) of DCT per $8{\times}8$ pixel block. Our algorithm worked block matching for DCT coefficients of the $8{\times}8$ pixel block is slid by one pixel along the image from the upper left corner to the lower right corner. Our algorithm can reduce computational complexity more than conventional copy moved forgery detection algorithms.

• 한국산업정보학회논문지
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• 제13권3호
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• pp.23-30
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• 2008

A data hiding method based on least significant bit (LSB) substitution and multi-pixel differencing (MPD) is presented on the proposed method to improve the capacity of the hidden secret data and to provide an imperceptible visual quality. First, a sum of different values for four-pixel sub-block is calculated. The low value of the sum can be located on a smooth block and the high value is located on an edged block. The secret data are hidden into the cover image by LSB method in the smooth block, while MPD method in the edged block. The experimental results show that the proposed method has a higher capacity and maintains a good visual quality.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2007년도 하계종합학술대회 논문집
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• pp.383-384
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• 2007

In this paper, we propose the new and simple method for sub-pixel block search algorithm by only using integer-pixel for motion estimation and compensation. In many papers, the fast search block match algorithms based on TSS have been proposed. However, these methods could be achieved a little reduction of the computational complexity. All of searching points by 1/4-pixel have own predicted integer-pixel SAD array. Therefor, if we know initial nine SAD values by integer, which is on the searching area of the reference frame, then we can find optimal searching point by 1/4-pixel, directly.

• Journal of Information Processing Systems
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• 제15권2호
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• pp.261-270
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• 2019

In order to protect secret digital documents against vulnerabilities while communicating, steganography algorithms are applied. It protects a digital file from unauthorized access by hiding the entire content. Pixel-value-difference being a method from spatial domain steganography utilizes the difference gap between neighbor pixels to fulfill the same. The proposed approach is a block-wise embedding process where blocks of variable size are chosen from the cover image, therefore, a stream of secret digital contents is hidden. Least significant bit (LSB) substitution method is applied as an adaptive mechanism and optimal pixel adjustment process (OPAP) is used to minimize the error rate. The proposed application succeeds to maintain good hiding capacity and better signal-to-noise ratio when compared against other existing methods. Any means of digital communication specially e-Governance applications could be highly benefited from this approach.

• ETRI Journal
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• 제32권3호
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• pp.380-389
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• 2010

This paper presents a new edge-protection algorithm and its very large scale integration (VLSI) architecture for block artifact reduction. Unlike previous approaches using block classification, our algorithm utilizes pixel classification to categorize each pixel into one of two classes, namely smooth region and edge region, which are described by the edge-protection maps. Based on these maps, a two-step adaptive filter which includes offset filtering and edge-preserving filtering is used to remove block artifacts. A pipelined VLSI architecture of the proposed deblocking algorithm for HD video processing is also presented in this paper. A memory-reduced architecture for a block buffer is used to optimize memory usage. The architecture of the proposed deblocking filter is verified on FPGA Cyclone II and implemented using the ANAM 0.25 ${\mu}m$ CMOS cell library. Our experimental results show that our proposed algorithm effectively reduces block artifacts while preserving the details. The PSNR performance of our algorithm using pixel classification is better than that of previous algorithms using block classification.