• JSTS:Journal of Semiconductor Technology and Science
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• v.15 no.6
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• pp.594-600
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• 2015

A 1.25 GHz multi-phase phase-rotating PLL is proposed for oversampling CDR applications and implemented with a low power and small area. Eight equidistant clock phases are simultaneously adjusted by the phase interpolator inside the PLL. The phase interpolator uses only two complementary clocks from a VCO, but it can cover the whole range of phase from $0^{\circ}$ to $360^{\circ}$ with the help of a PFD timing controller. The output clock phases are digitally adjusted with the resolution of 25 ps and both INL and DNL are less than 0.44 LSB. The proposed PLL was implemented using a 110 nm CMOS technology. It consumes 3.36 mW from 1.2 V supply and occupies $0.047mm^2$. The $jitter_{rms}$ and $jitter_{pk-pk}$ of the output clock are 1.91 ps and 18 ps, respectively.

• Journal of Power Electronics
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• v.14 no.6
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• pp.1334-1344
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• 2014

A novel single phase Phase-Locked Loop (PLL) is proposed in this paper to accurately and rapidly estimate the instantaneous phase angle of a grid. A conjugate rotating vector pair is proposed and defined to synthesize the single phase signal in the stationary reference frame. With this concept, the proposed PLL innovatively sets one phase input of the PARK transformation to a constant zero. By means of a proper cancellation, a zero steady state phase angle estimation error can be achieved, even under magnitude and frequency variations. The proposed PLL structure is presented together with guidelines for parameters adjustment. The performance of the proposed PLL is verified by comprehensive experiments. Satisfactory phase angle estimation can be achieved within one input signal cycle, and the estimation error can be totally eliminated in four input cycles for the most severe conditions.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.29 no.12
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• pp.83-87
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• 2015

This paper presents a simple notch filter, which is so suitable for three-phase unbalanced and distorted power line. In the d-q synchronous transformation, three-phase unbalanced and distorted voltages generate lots of ripple voltages on d-q axes. The ripples make disturbances on controllers such as PLL of phase tracking. Unbalanced state makes ripple of double the frequency of power line. Odd harmonics 5th and 7th on the line make even 4th and 6th ripples on d-q axes due to the rotating reference frame, respectively. Cascaded two comb filters, delay lines 1/4T and 1/8T, are adopted for the ripple rejection. The filter rejects harmonics 2nd, 4th, 6th, 10th and so on. They are very effective to remove the ripples of both unbalance and distortion. The filter, implemented by two FIFOs on an experimental system, is adopted on a PLL controller of power line phase tracking. Through the simulation and experimental results, performance of the proposed comb filter has been validated.

• Proceedings of the KIPE Conference
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• 2004.07b
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• pp.665-669
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• 2004

Generally, Slotless PM BLDC drive system is necessary that the three Hall-ICs evenly be distributed around the stator circumference and encoder be installed in case of the 3 phase motor. So, the Hall-ICs are set up in this motor to detect the main flux from the rotor, and the output signal from Hall-ICs is used to drive a power transistor to control the winding current. However, instead of using three Hall-ICs and encoder, we used only two Hall-ICs for the permanent magnet rotor position and for the speed feedback signals, and also for a microcontroller of 16-bit type (80C196KC) with the 3 phase Slotless PM BLDC whose six stator and two rotor designed. Two Hall-IC Hc and $H_B$ are placed on the endplate at 120 degree intervals, and with these elements, we can estimate information of the others phase in sequence through a rotating rotor.

• Proceedings of the KIPE Conference
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• 2007.07a
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• pp.441-443
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• 2007

In this paper, The authors design the current controller which independently control the d, q axis current transformed by the synchronously rotating d, q axis and a Space Vector Pulse Width Modulation(SVPWM) to steadily control the output DC-Link voltage against the variable load of the three phase PWM converter. Also, This study improves the high power factor, stability, and rapid response by the phase angle control using the digital Phase Locked Loop(PLL).

• The Transactions of the Korean Institute of Electrical Engineers D
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• v.51 no.2
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• pp.78-85
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• 2002

We introduce a rotational decision-directed joint algorithm of blind equalization coupled with carrier recovery for 32-QAM demodulation with high symbol rate. The proposed carrier recovery, which we call a rotational decision-directed carrier recovery(RDDCR), removes the residual phase difference by rotating the decision boundary for the kth received symbol by the frequency detector output of the (k-1)th received symbol. Since the RDDCR includes the function of PLL loop filter by rotating the decision boundary, it gives a simpler demodulator structure. The rotational decision-directed blind equalization(RDDBE) with the rotated decision boundary based on the Stop-and-Go Algorithm(SGA) operated during tracking the frequency offset by the RDDCR and removes intersymbol interference due to multipaths and channel noise. Test results show that symbol error rate of $10^{-3}$ is obtained before the forward error correction when SNR equals 15dB with 150KHz of carrier frequency offset and two multipaths, which is the channel condition for 32-QAM receiver.

• Journal of Power Electronics
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• v.16 no.3
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• pp.1176-1189
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• 2016

In this paper, a novel quasi-direct power control (Q-DPC) scheme based on a resonant frequency adaptive proportional-resonant (PR) current controller with a variable frequency resonant phase locked loop (RPLL) is proposed, which can achieve a fast power response with a unity power factor. It can also adapt to variations of the generator frequency in T-type Three-level shaft synchronous generator (SSG) converters. The PR controller under the static α-β frame is designed to track ac signals and to avert the strong cross coupling under the rotating d-q frame. The fundamental frequency can be precisely acquired by a RPLL from the generator terminal voltage which is distorted by harmonics. Thus, the resonant frequency of the PR controller can be confirmed exactly with optimized performance. Based on an instantaneous power balance, the load power feed-forward is added to the power command to improve the anti-disturbance performance of the dc-link. Simulations based on MATLAB/Simulink and experimental results obtained from a 75kW prototype validate the correctness and effectiveness of the proposed control scheme.

• Proceedings of the Korean Society for Noise and Vibration Engineering Conference
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• 1991.04a
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• pp.95-98
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• 1991

회전 기기의 이상으로 인하여 발생하는 진동은 축 회전속도의 고주파 성분 (super-harmonic)이나 또는 분수조파 성분(sub-harmonic)으로 나타나는 경 우가 대부분이기 때문에 회전기기의 진동을 주파수 영역에서 해석함에 있어 파워 스펙트럼의 주파수 축을 Hz로 나타내기보다는 축 회전속도의 order로 써 나타내는 것이 매우 유용하다. 스펙트럼을 order로써 나타내기 위해서는 샘플링 시간을 축 회전속도와 동기(synchronization)시켜야 하는데 이 방법으 로는 회전축에 엔코더(encorder)를 부착하여 엔코더에서 발생하는 펄스 신호 를 이용하여 샘플링하는 방법과 order tracking 필터를 이용하는 방법이 있 다. 그러나 전자의 방법은 원하는 회전축마다 엔코더를 부착하여야 하며 경 우에 따라서는 엔코더를 부착하기가 어려운 경우도 있으며, 회전기기의 운전 개시나 종료시처럼 회전속도가 급격히 변화하는 경우에는 낮은 주파수에서 중첩(aliasig)에 의한 오차가 수반될 수도 있다. 후자의 방법은 order tracking 필터 이외에도 여러 부수장비가 필요하며 기준 주파수(즉 회전속 도)가 급격히 변화하는 경우 PLL(phase locked loop)에서 tracking 오차가 발생된다. 최근에 발표된 논문에서 일정한 시간간격으로 샘플링한 데이터들 로부터 신호를 재합성하여 회전축의 속도와 동기가 되도록 재 샘플링함으로 서 스펙트럼의 주파수를 회전속도의 order로써 나타내는 방법을 제시하였다. 그러나 위 논문에서는 신호의 재합성에 필요한 재합성 필터(reconstruction filter)의 설계 방법에 대하여 구체적인 언급이 없이 다만 결과만을 논하였다. 따라서 본 논문에서는 재합성 필터의 설계 방법에 대하여 구체적인 방법을 제시하고 또한 동기화 샘플링의 장점 및 고려 사항에 대하여 고찰하였다. 고려한 능동 소음제어 에 대해 연구하였다. 경량화 추세에 따라 지반이나 케이싱이 경량이거나 유연하여 회전축과 동적으로 연성된 경우 회전축-베어링-지반으로 이루어진 2중구조의 회전축 계 동특성을 해석할 수 있는 프로그램을 개발하므로서 회전 기계류의 진동 전반에 걸친 문제점에 대한 그 원인과 현상을 명확히 분석하여 국내의 전기 계류의 보다 신뢰성있는 설계 및 제작자료를 확보하는데 기여할 수 있게 하 였다.존의 small molecular Gd-chelate에 비해 매우 큼을 알 수 있었다. MnPC는 간세포에 흡수된 후 담도계로 배출되는 간특이성 조영제임을 확인하였다. 장비 내에서 반복 시행한 평균값의 차이는 대체적으로 유의한 차이가 없었으나, 다른 장비에서 반복 시행한 장비간의 사이에는 유의한 차이가 있는 경우가 더 많았다. 따라서 , MRS 검사를 소뇌나 뇌교의 어떤 절환에 적용하기 전에 각 장비 마다 정상 기준치를 반드시 얻은 후에 이상여부를 판 정하는 것이 필수적이라고 생각된다.EX> 이상이 적절한 진단기준으로 생각되었다. $0.4{\;}\textrm{cm}^3$ 이상의 좌우 부피차를 보이는 모든 증례에서 육안적으로도 해마위축이 뚜렷이 나타났다. 결론 : MR영상을 이용한 해마의 부피측정은 해마경화증 환자의 진단에 있어 육안적인 MR 진단이 어려운 제한된 경우에만 실제적 도움을 줄 수 있는 보조적인 방법으로 생각된다.ofile whereas relaxivity at high field is not affected by τS. On the other hand, the change in τV does not affect low field profile but strongly in fluences on both inflection fie이 and the maximum relaxivity value. The re