• ETRI Journal
• /
• 제38권1호
• /
• pp.133-140
• /
• 2016

This paper presents a method of parasitic inductance reduction for high-speed switching and high-efficiency operation of a cascode structure with a low-voltage enhancement-mode silicon (Si) metal-oxide-semiconductor field-effect transistor (MOSFET) and a high-voltage depletion-mode gallium nitride (GaN) fielde-ffect transistor (FET). The method is proposed to add a bonding wire interconnected between the source electrode of the Si MOSFET and the gate electrode of the GaN FET in a conventional cascode structure package to reduce the most critical inductance, which provides the major switching loss for a high switching speed and high efficiency. From the measured results of the proposed and conventional GaN cascode FETs, the rising and falling times of the proposed GaN cascode FET were up to 3.4% and 8.0% faster than those of the conventional GaN cascode FET, respectively, under measurement conditions of 30 V and 5 A. During the rising and falling times, the energy losses of the proposed GaN cascode FET were up to 0.3% and 6.7% lower than those of the conventional GaN cascode FET, respectively.

• ETRI Journal
• /
• 제15권3_4호
• /
• pp.61-69
• /
• 1994

A new analytical model for the base current of Si/SiGe/Si heterojunction bipolar transistors(HBTs) has been developed. This model includes the hole injection current from the base to the emitter, and the recombination components in the space charge region(SCR) and the neutral base. Distinctly different from other models, this model includes the following effects on each base current component by using the boundary condition of the excess minority carrier concentration at SCR boundaries: the first is the effect of the parasitic potential barrier which is formed at the Si/SiGe collector-base heterojunction due to the dopant outdiffusion from the SiGe base to the adjacent Si collector, and the second is the Ge composition grading effect. The effectiveness of this model is confirmed by comparing the calculated result with the measured plot of the base current vs. the collector-base bias voltage for the ungraded HBT. The decreasing base current with the increasing the collector-base reverse bias voltage is successfully explained by this model without assuming the short-lifetime region close to the SiGe/Si collector-base junction, where a complete absence of dislocations is confirmed by transmission electron microscopy (TEM)[1].The recombination component in the neutral base region is shown to dominate other components even for HBTs with a thin base, due to the increased carrier storage in the vicinity of the parasitic potential barrier at collector-base heterojunction.

• 대한전자공학회논문지
• /
• 제27권9호
• /
• pp.1378-1385
• /
• 1990

In this paper we propose a model which can predict well the logical errors come from the charge redistribution in domino gates. In this model the effect of the intrinsic capacitance between gate and channel of MOSFET's is considered. This effect is more important than the parasitic capacitance effect. The error by the proposed model is only 8% of that by the currently used model. This model can be used as a guide-line in the design of domino circuits.

• 한국항행학회논문지
• /
• 제21권5호
• /
• pp.459-465
• /
• 2017

본 논문에서는 간접낙뢰로 인한 항공기 탑재 장비의 손상을 방지하기 위한 간접낙뢰 보호회로의 설계시 고려해야 하는 사항들을 설명한다. 낙뢰로부터 유도된 서지 전압은 항공기 전기 전자장비의 기능 장애나 손상을 가져오는데 이것을 낙뢰의 간접영향이라 한다. 이러한 항공기의 낙뢰 간접영향으로부터 항공전자 장비를 보호하기 위해서는 항공기에 가해진 낙뢰로 인한 영향성을 분석하고 이에 따른 보호 설계를 각각의 장비에 적용한다. 설계된 간접낙뢰 보호회로는 PCB와 TVS다이오드에 기생하는 인덕턴스로 인해 의도치 않은 결과를 가져올 수 있다. 본 논문에서는 간접낙뢰 보호회로를 구성하는 요소들에 기생하는 인덕턴스를 고려한 보호회로 설계 방법을 소개한다. 또한 설계된 보호회로의 유효성 확인을 위해 수행한 낙뢰 간접영향 검증시험 결과를 보인다.

• Parasites, Hosts and Diseases
• /
• 제53권3호
• /
• pp.355-359
• /
• 2015

Hydatid disease imposing serious threat on human health and great loss in live-stock pastoralism remains a major public health problem in western China. To assess and monitor the effect of control program on transmission dynamics, we used the prevalence of cystic echinococcosis in slaughtered sheep at slaughterhouse as an indicator during the period of 2007 to 2013 in Emin County, Xinjiang Uygur Autonomous Region, China. The results showed a significant decline trend of prevalence in all age groups during the 7 years when the control program was implemented; particularly, the rate was reduced by 72% after first 3 years. Among the sheep slaughtered, the age distribution evidenced that the prevalence increased significantly as the sheep grew older. The baseline data indicated that the rate was 4.5% at the age <1, 6.7% at age 2~, and reached to the highest 17.9% at age ${\geq}4$ years. Earlier response to the intervention pressure was seen in the sheep at the younger age. Significant decline started from 2008 at the age <1, from 2009 at age of 1~, 2010 at 2~ to 3~, and the latest, in 2012 at age ${\geq}4$. This study demonstrated that the prevalence of cystic echinococcosis in slaughtered sheep may be used as an indicator to assess and monitor the transmission status during and after control program providing information for betterment of performance to sustain control strength.

• 한국응용곤충학회지
• /
• 제60권3호
• /
• pp.313-314
• /
• 2021

벗초파리기생벌인 A. japonica의 벗초파리 유충의 발육단계에 따른 기생특성과 기생당한 유충과 번데기에서 형태적인 차이를 조사하였다. 또한 A. japonica의 우화기간이 벗초파리 우화일수 보다 더 소요되는 것을 확인하였다. A. japonica는 벗초파리 유충에 효과적인 기생 및 살충 효과를 나타내었으며 벗초파리 방제를 위한 천적으로 활용이 가능할 것으로 보인다.

• 대한전자공학회:학술대회논문집
• /
• 대한전자공학회 2001년도 하계종합학술대회 논문집(1)
• /
• pp.413-416
• /
• 2001

In high frequency range, RF circuit design without considering shielding effect can cause several significant changes due to increase in parasitic capacitance and inductance between RF signal lines and shielding box. In this paper, bandpass filter has been made to measure the shielding effect and its s-parameter has been measured by Vector Network Analyzer (VNA). Equivalent circuit model including the shielding effect has been constructed with the lumped elements extracted from the 3D electromagnetic simulator, Maxwell SI. Then, the validity of the model is verified using microwave circuit simulator, ADS (Advanced Design System).

• 한국광학회지
• /
• 제14권4호
• /
• pp.423-428
• /
• 2003

직접 변조형 반도체 레이저 다이오드에서 전류차단층의 구조들이 누설전류 및 대역폭에 미치는 영향을 조사하였다. 전류차단층을 통한 누설전류는 전류-전압미분특성 곡선을 통하여, 전류차단층의 기생성분들이 대역폭에 미치는 영향은 차감법(Subtraction method)을 사용하여 분석하였다. 실험결과로부터 정적 및 동적특성에 동시에 우수한 특성을 보이는 전류차단층 구조로서‘inin’형 차단구조가 매우 효과적임을 밝혔다.

• 전기학회논문지
• /
• 제65권10호
• /
• pp.1664-1671
• /
• 2016

This paper presents the analysis of the gate-source voltage of the gallium nitride high electronic mobility transistor (GaN HEMT) in the half bridge structure focused on the mutual effects of two switching operation. Especially low side gate-source voltage is analyzed mathematically according to the high side switch turn-on and turn-off operation. Moreover, the influence of each gate resistance and parasitic component on the switching characteristic of other side switch is investigated, and the formula, simulation and experimental results are compared with theoretical data.

• 대한전기학회:학술대회논문집
• /
• 대한전기학회 2007년도 심포지엄 논문집 정보 및 제어부문
• /
• pp.196-198
• /
• 2007

A circuit design technique to reduce the propagation time is proposed for the analog parallel processing-based Viterbi decoder. The analog Viterbi decoder implements the function of the conventional digital Viterbi decoder utilizing the analog parallel processing circuit technology. The decoder is for the PR(1.2,2.1) signal of DVD. The benefits are low power consumption and less silicon occupation. In this paper, a propagation time reduction technique is proposed by minimizing the parasitic capacitance components in the layout design of the analog Viterbi decoder. The propagation time reduction effect of the proposed technique has been shown via HSPICE simulation.