• 한국정보디스플레이학회:학술대회논문집
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• 2007.08a
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• pp.875-877
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• 2007

Zinc tin oxide (ZTO) sol-gel solution was synthesized for ink-jet printable semiconducting ink. Bottom-contact type TFT was produced by printing the ZTO layer between the source and drain electrodes. The transistor involving the ink-jet printed ZTO had the $mobility\;{\sim}\;0.01\;cm^2V^{-1}s^{-1}$. We demonstrated the direct-writing of semiconducting oxide for solution processed TFT fabrication.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.48 no.3
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• pp.1-6
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• 2011

Low-power logic gates, i.e. inverter, NAND, and NOR, are proposed employing only n-channel oxide thin film transistors (TFTs). The proposed circuits were designed to prevent the pull-up and pull-down switches from being turned on simultaneously by using asymmetric feed-through and bootstrapping, thereby exhibited same output voltage swing as the input signal and no static current. The inverter is composed of 5 TFTs and 2 capacitors. The NAND and the NOR gates consist of 10 TFTs and 4 capacitors respectively. The operations of the logic gates were confirmed successfully by SPICE simulation using oxide TFT model.

• Proceedings of the Korean Vacuum Society Conference
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• 2014.02a
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• pp.276-276
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• 2014

High-performance, fully-transparent, and top-gated oxide thin-film transistor (TFT) was successfully fabricated with Ta2O5 high-k gate dielectric on a glass substrate. Through a self-passivation with the gate dielectric and top electrode, the top-gated oxide TFT was not affected from H2O and O2 causing the electrical instability. Heat-treated InSnO (ITO) was used as the top and source/drain electrode with a low resistance and a transparent property in visible region. A InGaZnO (IGZO) thin-film was used as a active channel with a broad optical bandgap of 3.72 eV and transparent property. In addition, using a X-ray diffraction, amorphous phase of IGZO thin-film was observed until it was heat-treated at 500 oC. The fabricated device was demonstrated that an applied electric field efficiently controlled electron transfer in the IGZO active channel using the Ta2O5 gate dielectric. With the transparent ITO electrodes and IGZO active channel, the fabricated oxide TFT on a glass substrate showed optical transparency and high carrier mobility. These results expected that the top-gated oxide TFT with the high-k gate dielectric accelerates the realization of presence of fully-transparent electronics.

• Proceedings of the Korean Vacuum Society Conference
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• 2010.08a
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• pp.189-189
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• 2010

최근 연구와 생산에 가속이 붙기 시작한 AMOLED는 모두 LTPS TFT를 사용하고 있다. LTPS TFT는 높은 전자 이동도를 가지고 있기 때문에 현재 각광 받는 AMOLED에 잘 맞는다. 하지만 LTPS TFT는 균일성이 낮고 고비용이라는 문제점이 있으며, 현재 대면적 기술이 부족한 상태이다. 극복방안으로 AMOLED를 타겟으로 하는 Oxide TFT와 a-Si TFT의 기술이 발전되고 있다. Oxide TFT는 AMOLED backplane으로 사용될 수 있는 강력한 후보 중의 하나이다. Oxide TFT는 단결정 산화물과 다결정 복합 산화물 두 가지 범주를 가지고 있다. 본 연구에서는 다결정 Oxide TFT의 하나인 ZTO TFT를 연구함으로서 Engineer의 근본적 이슈인 저비용에 초점을 맞추어 소자특성을 확인해보도록 한다. n-type wafer 에 PE-CVD 장비를 이용하여 SiNx를 120 nm 증착하고, channel layer인 ZTO 용액을 spin-coating을 이용하여 형성하였다. 균일하게 형성된 ZTO의 결정을 위하여 $500^{\circ}C$에서 1시간 동안 공기 중에서 annealing을 하였다. 과정을 거친 ZTO는 약 30 nm 두께로 형성되었다. Thermal evaporator를 이용하여 Source, Drain의 전극을 형성 하고, wafer 뒷면에는 Silver paste를 이용하여 Gate를 형성하였다. 제작된 소자를 dark room temperature 에서 측정 하였다. 측정된 소자는 우수한 전기적 특성과 0.96 cm2/Vs 인 이동도를 얻어냈다. 이러한 소자의 안정성에 따른 전기적 특성을 관측하기 위하여 상온에서 $100^{\circ}C$ 까지의 온도 스트레스를 주었다. Stress에 따른 소자는 상온에서 시작하여 온도가 올라갈수록 이동도가 낮아지고, 문턱전압 증가와 SS이 커짐을 알 수 있었다. 캐리어의 운동 매커니즘에서 온도가 올라가면 격자진동의 영향을 크게 받음으로서 캐리어의 이동도가 낮아져 전기적 특성이 낮아지는 점이 본 연구에도 적용됨을 알 수 있었다. 본 연구를 통하여 화학적 안정성을 지닌 소자라는 점과 더불어 여타 TFT공정에 비하여 현저히 낮은 공정비용을 통하여 AMOLED가 요구하는 수준의 특성에 가까운 소자를 제작할 수 있다는 것을 확인하였으며 앞으로의 추가적인 연구에 따라서 더욱 완성된 공정기술을 기대할 수 있었다.

• Journal of Information Display
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• v.13 no.2
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• pp.61-66
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• 2012

The double-layered Ti/Si barrier metal is demonstrated for the source/drain Cu interconnections in oxide semiconductor thin-film transistors (TFTs). The transmission electromicroscopy and ion mass spectroscopy analyses revealed that the double-layered barrier structure suppresses the interfacial reaction and the interdiffusion at the interface after thermal annealing at $350^{\circ}C$. The underlying Si layer was found to be very useful for the etch stopper during wet etching for the Cu/Ti layers. The oxide TFTs with a double-layered Ti/Si barrier metal possess excellent TFT characteristics. It is concluded that the present barrier structure facilitates the back-channel-etch-type TFT process in the mass production line, where the four- or five-mask process is used.

• The Transactions of the Korean Institute of Electrical Engineers C
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• v.50 no.8
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• pp.365-370
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• 2001

We have proposed and fabricated a new poly-Si TFT employing air-cavities at the edges of gate oxide in order to reduce the vertical electric field induced near the drain due to low dielectric constant of air. Air-cavity has been successfully fabricated by employing the wet etching of gate oxide and APCVD (Atmospheric pressure chemical vapor deposition) oxide deposition. Our experimental results show that the leakage current of the proposed TFT is considerably reduced by the factor of 10 and threshold voltage shift under high gate bias is also reduced because the carrier injection into gate insulator over the drain depletion region is suppressed.

• Proceedings of the Materials Research Society of Korea Conference
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• 1994.11a
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• pp.83-84
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• 1994

• 한국정보디스플레이학회:학술대회논문집
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• 2008.10a
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• pp.211-213
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• 2008

The TFTs from ZnO semiconductor with hafnium oxide dielectrics were prepared by atomic layer deposition to characterize the electrical properties. Good electrical properties of oxide TFT was obtained with channel mobility of $2.1\;cm^2/Vs$, threshold voltage of 0 V, the subthreshold slope of 0.9 V/dec, and on to off current ratio of $10^6$.

• 한국정보디스플레이학회:학술대회논문집
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• 2009.10a
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• pp.1047-1050
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• 2009

The two approaches to improve the stability of oxide TFTs are described. First approach is the optimization of device architecture including MIS structure and passivation layer using conventional InGaZnO semiconductor channel layer. Second approach is to develop the new kinds of oxide semiconductor materials, which is very robust and stable against the gate bias stress and thermal stress.

• 한국정보디스플레이학회:학술대회논문집
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• 2009.10a
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• pp.35-37
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• 2009

In this work, we introduce new next generation activematrix backplane technologies for large-size AMOLED displays. Among the general requirements for successful market launch of AMOLED TVs, backplane issues are discussed. It will be shown that the amorphous oxide TFT is most suitable due to large scalability and superior cost effectiveness. Development status and current challenges of amorphous oxide TFTs are discussed.