• Journal of Multimedia Information System
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• v.5 no.2
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• pp.139-142
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• 2018

This work presents a novel architecture of phase locked loop (PLL) with the current compensating scheme to improve phase noise characteristic. The proposed PLL has two charge pumps (CP), main-CP (MCP) and sub-CP (SCP). The smaller SCP current with same time duration but opposite direction of UP/DN MCP current is injected to the loop filter (LF). It suppresses the voltage fluctuation of LF. The PLL has a novel voltage controlled oscillator (VCO) consisting of a voltage controlled resistor (VCR) and the three-stage ring oscillator with latch type delay cells. The VCR linearly converts voltage into current, and the latch type delay cell has short active on-time of transistors. As a result, it improves phase noise characteristic. The proposed PLL has been fabricated with $0.35{\mu}m$ 3.3 V CMOS process. Measured phase noise at 1 MHz offset is -103 dBc/Hz resulting in 3 dBc/Hz phase noise improvement compared to the conventional PLL.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 1999.05a
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• pp.335-339
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• 1999

This Paper Proposes a circuit system that is capable of rejecting the zero phase voltage produced by a inverter, which transform do-ac power using high speed power semiconductor. It generates a rejecting voltage which has the same amplitude as, but the opposite phase to the zero phase voltage. The rejecting voltage is superimposed on the load line for rejecting of the zero phase voltage through a transformer. Simulation results show that the zero phase voltage applied to the load and ground current are eliminated.

• Transactions of the Society of Information Storage Systems
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• v.3 no.3
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• pp.118-122
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• 2007

Phase-change wet-etching technology using GeSbTe phase-change films is developed. Selective etching between an amorphous and a crystalline phase can be carried out with an alkaline etchant of NaOH. Etching selectivity is dependent not only on the concentration of the alkaline etchant but also on the film structure. Specifically, metal films for heat control cause marked effects on the etching properties of GeSbTe film. Surviving amorphous pits can be obtained with Al metal layer, however etched amorphous pits are seen with Ag metal layer. An opposite selective etching behavior can be observed between samples with two different metal layers.

• Journal of the Korean Ceramic Society
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• v.22 no.4
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• pp.47-53
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• 1985

Various amount of $P_2O_5$ were added to $PbO-B_2O_3$ binary glass system to investigate its effect on the phase separation and physical properties of the glass. Experiments such as infrared spectroscopy scanning electron microscopy thermal expansion softening point and microhardnesses were done. Phase separation with $B_2O_3$ rich phase matrix and PbO rich phase droplet was observed for the glasses con-taining less than 10m/o of PbO while the opposite morphology of phase separation for the glasses containing more than 11m/o of PbO. By adding increasing amount of $P_2O_5$ their phase separation region was extended to the glass containing more than 20m/o of PbO. These effects can be interpreted in terms of the inoic field strength difference of each ions in the glasses. The abrupt changes of physical properties such as softening point thermal expansion and microhardness were observed for the glass with around 10m/o of PbO in this system. These changes are by the matrix composition change from TEX>$B_2O_3$ rich phase to PbO rich phase depending on PbO concentration.

• Transactions on Electrical and Electronic Materials
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• v.15 no.1
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• pp.37-40
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• 2014

A novel memory is reported, in which $Ge_2Sb_2Te_5$ (GST) has been used as a floating gate. The threshold voltage was shifted due to the phase transition of the GST layer, and the hysteretic behavior is opposite to that arising from charge trapping. Finite Element Modeling (FEM) was adapted, and a new simulation program was developed using c-interpreter, in order to analyze the small shift of threshold voltage. The results show that GST undergoes a partial phase transformation during the process of RESET or SET operation. A large $V_{TH}$ shift was observed when the thickness of the GST layer was scaled down from 50 nm to 25 nm. The novel 1 transistor PCM (1TPCM) can achieve a faster write time, maintaining a smaller cell size.

• Journal of Astronomy and Space Sciences
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• v.27 no.3
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• pp.239-244
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• 2010

A simulation for the design of a $90^{\circ}$ differential phase shifter aimed toward Korean VLBI Network (KVN) 129 GHz band polarizer is described in this paper. A dual-circular polarizer for KVN 129 GHz band consists of a $90^{\circ}$ differential phase shifter and an orthomode transducer. The differential phase shifter is made up of a square waveguide with two opposite walls loaded with corrugations. Three-dimensional electromagnetic simulation has been performed to predict the $90^{\circ}$ differential phase shifter's characteristics. The simulation for the differential phase shifter shows that the phase shift is $90^{\circ}{\pm}3.3^{\circ}$ across 108-160 GHz and the return losses of two orthogonal modes are better than -30 dB within the design frequency band. According to the simulation results the calculated performance is quite encouraging for KVN 129 GHz band application.

• The Transactions of the Korean Institute of Electrical Engineers P
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• v.57 no.2
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• pp.121-126
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• 2008

This paper analyzes the losses of a Steinmetz connection three-phase induction motor which is supplied by a single-phase source. The T-type equivalent circuit which is taken no-load losses into account is used to determine phase converter capacitive reactances at starting and rated speed by using the condition of the minimum voltage unbalance. The starting and the operating capacitor are replaced at the slip of the same voltage unbalance factor points which are depicted using two capacitive reactances. The operation characteristics are investigated by comparing with those of three-phase balanced operation to find the feasibility of single-phase operation. To analyze the losses of this motor, the output power decrease factor(OPDF), the loss ratio(LR), the no load loss ratio(NLLR), the copper loss ratio(CLR), the stator copper loss ratio(SCLR), and the rotor copper loss ratio(RCLR) are defined and simulated in the whole slip range. The simulated results show that OPDF is maintained almost uniformly, LR is low at low speed and high at high speed, CLR is higher !ban NLLR, but CLR varies concavely and NLLR varies convexly at high speed, SCLR is low at low speed and high at high speed, but SCLR varies convexly at high speed, and RCLR is nearly opposite to SCLR.

• Journal of Communications and Networks
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• v.2 no.1
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• pp.69-75
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• 2000

A new frame synchronization confirmation technique using a pilot pattern of both uplink and downlink channels is proposed for W-CDMA (Wideband Code Division Multiple Access) system. It is shown that by using this technique, we can cancel the side lobe for autocorrelation functions of the frame synchronization words of pilot pattern have the maximum to-of-phase autocorrelation value "4" with two peak values equal in magnitude and opposite in polarity at zero and middle shifts. Due to this side lobe cancellation effect, therefore, the autocorrelation function of the frame synchronization words becomes ideal for the frame synchronization confirmation since double maximum correlation values equal in magnitude and opposite polarity at zero ad middle shifts can be achieved. This property can be used to double check frame synchronization timing and thus. improve the frame synchronization confirmation performance.

• The Transactions of the Korean Institute of Power Electronics
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• v.17 no.3
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• pp.266-273
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• 2012

In this paper, the new open fault detection and tolerant operation method for 3 phase PWM rectifier is proposed. When open fault occurred on the inverter switches of 3 Phase PWM rectifier, the DC link voltage ripple is increased because the input current of the faulty phase is distorted. In this case, the quality of electric power would decrease, and the life time of DC link capacitor is decreased. The open fault is detected by a simple MRAS(Model Reference Adaptive System) without additional hardware sensors, and the tolerant operation carried out by turning on the opposite switch of the faulty switch without any redundancy. By the proposed method, the faulty phase input current can be controlled, so that 3-phase input current is balanced relatively under the faulty condition and the voltage ripple of DC link output is reduced. The validity of the proposed technique is proved on the 6kW 3-phase PWM rectifier system by simulation and experiment.

• The Journal of the Korea Contents Association
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• v.14 no.3
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• pp.374-384
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• 2014

In this paper, characteristics of transactions by investors were examined based on the relationship between South Korea's stock market trends and the amount of net purchasing by investors. The study period is from January of 2004 to December of 2011, a total 1,991 days on 96 months. Data used for correlation and regression analysis include the value of the KOSPI index at the end of each month, the monthly net purchase amount of each of the groups, as well the daily volume, the daily price. In this study, the long-term phase of the market divided by refining. and each of the investment position of invest group was investigated. As a result, foreign investors are a net selling position when market was rising phase of the tertiary. And private investors were a net short positions when the market was decline phase of the tertiary. Regardless of the flow changes, the private investors had opposite position to the flow of the mark, also they had opposite position to the position of the foreign investors.