• Title/Summary/Keyword: operational transconductance amplifier

Search Result 64, Processing Time 0.028 seconds

A Design of Voltage-Controlled CMOS OTA and Its Application to Tunable Filters (전압-제어 CMOS OTA와 이를 이용한 동조 여파기 설계)

  • 차형우;정원섭
    • Journal of the Korean Institute of Telematics and Electronics
    • /
    • v.27 no.8
    • /
    • pp.1260-1264
    • /
    • 1990
  • A voltage controlled CMOS operational transconductance amplifier (OTA), whose transconductance is directly proportional to the DC bias voltage, has been designed for many electronic circuit applications. It consists of a differential pair and three ourrent mirrors. The SPICE simulation shows that the conversion sensitivity of the OTA is 41.817 \ulcornerho/V and the linearity error is less than 0.402% over a bias voltage range from -2. OV to 1. OV. Electrically tunalble filters based on voltage controlled impedances, which are realized with OTA's, also have been designed. The SPICE simulation shows that a second-order bandpass filter, whose center frequency is 23KHz at -1. OV, has the conversion sensitivity 6.6KHz/V and the linearity error less than 0.822% over a voltage range from -2.OV tp 1.OV, Tne OTA has been laid out with the 3\ulcorner n-well CMOS design rule adopted in ISRC (inter-university semiconductor research center). The chip size was about $0.756x0.945mm^2$.

  • PDF

Low-Power, High Slew-Rate Transconductance-Boosted OP-AMP for Large Size, High Resolution TFT-LCDs

  • Choi, Jin-Chul;Kim, Seong-Joong;Sung, Yoo-Chang;Kwon, Oh-Kyong
    • 한국정보디스플레이학회:학술대회논문집
    • /
    • 2003.07a
    • /
    • pp.72-75
    • /
    • 2003
  • For the analog output buffer in the data driver for large size and high resolution TFT-LCDs, we proposed operational amplifier (op-amp) which contains newly developed transconductance-boosted input stage which enables the low-power consumption and the high slew-rate. The slew-rate and the quiescent current of the proposed op-amp are $6.1V/{\mu}sec$ and $8{\mu}A$, respectively.

  • PDF

Current-controllable saw-tooth waveform generators using current-tunable Schmitt trigger (전류-제어 슈미트 트리거를 이용한 전류-제어 톱니파 발생기)

  • Chung, Won-Sup;Lee, Myung-Ho
    • Journal of the Institute of Electronics Engineers of Korea SD
    • /
    • v.44 no.7 s.361
    • /
    • pp.31-36
    • /
    • 2007
  • A saw-tooth waveform generator whose frequency can be controlled with a do bias current is proposed. The generator utilizes operational transconductance amplifiers (OTA's) as switching element. It features simple and wide sweep capability The circuit built with commercially avaliable components exhibits good linearity of current-to-frequency transfer characteristics and relatively low temperature sensitivity.

A Gate-Leakage Insensitive 0.7-V 233-nW ECG Amplifier using Non-Feedback PMOS Pseudo-Resistors in 0.13-μm N-well CMOS

  • Um, Ji-Yong;Sim, Jae-Yoon;Park, Hong-June
    • JSTS:Journal of Semiconductor Technology and Science
    • /
    • v.10 no.4
    • /
    • pp.309-315
    • /
    • 2010
  • A fully-differential low-voltage low-power electrocardiogram (ECG) amplifier by using the nonfeedback PMOS pseudo-resistors is proposed. It consists of two operational-transconductance amplifiers (OTA) in series (a preamplifier and a variable-gain amplifier). To make it insensitive to the gate leakage current of the OTA input transistor, the feedback pseudo-resistor of the conventional ECG amplifier is moved to input branch between the OP amp summing node and the DC reference voltage. Also, an OTA circuit with a Gm boosting block without reducing the output resistance (Ro) is proposed to maximize the OTA DC gain. The measurements shows the frequency bandwidth from 7 Hz to 480 Hz, the midband gain programmable from 48.7 dB to 59.5 dB, the total harmonic distortion (THD) less than 1.21% with a full voltage swing, and the power consumption of 233 nW in a 0.13 ${\mu}m$ CMOS process at the supply voltage of 0.7 V.

Design of High-Gain OP AMP Input Stage Using GaAs MESFETs (갈륨비소 MESFET를 이용한 고이득 연산 증폭기의 입력단 설계)

  • 김학선;김은노;이형재
    • The Journal of Korean Institute of Communications and Information Sciences
    • /
    • v.17 no.1
    • /
    • pp.68-79
    • /
    • 1992
  • In the high speed analog system satellite communication system, video signal processing and optical fiber interface circuits, GaAs high gain operational amplifier is advantageous due to obtain a high gain because of its low transconductance and other drawbacks, such as low frequency dispersion and process variation. Therefore in this paper, a circuit techniques for improving the voltage gain for GaAs MESFET amplifier is presented. Also, various types of existing current mirror and current mirror proposed are compared.To obtain the high differential gain, bootstrap gain enhancement technique is used and common mode feedback is employed in differential amplifier.The simulation results show that gain is higher than that of basic amplifier about 18.6dB, and stability and frequency performance of differential amplifier are much improved.

  • PDF

A Design of Bandpass Filter for Body Composition Analyzer (체성분 측정기용 대역통과 필터 설계)

  • Bae, Sung-Hoon;Cho, Sang-Ik;Lim, Shin-Il;Moon, Byoung-Sam
    • Journal of the Institute of Electronics Engineers of Korea SC
    • /
    • v.42 no.5 s.305
    • /
    • pp.43-50
    • /
    • 2005
  • This paper describes some IC(integrated circuits) design and implementation techniques of low power multi-band Gm-C bandpass filter for body composition analyzer. Proposed BPF(bandpass filter) can be selected from three bands(20 KHz, 50 KHz, 100 KHz) by control signal. To minimize die area, a simple center frequency tuning scheme is used. And to reduce power consumption, operational transconductance amplifier operated in the sub-threshold region is adopted. The proposed BPF is implemented with 0.35 um 2-poly 3-metal standard CMOS technology Chip area is $626.42um\;{\times}\;475.8um$ and power consumption is 700 nW@100 KHz.

A Simulation-Based Analog Cell Synthesis with Improved Simulation Efficiency (시뮬레이션 효율을 향상시킨 시뮬레이션 기반의 아날로그 셀 합성)

  • 송병근;곽규달
    • Journal of the Korean Institute of Telematics and Electronics C
    • /
    • v.36C no.10
    • /
    • pp.8-16
    • /
    • 1999
  • This paper presents a new simulation-based analog cell synthesis approach with improved simulation efficiency For the hierarchical synthesis of analog cells we developed the sub-circuit optimizers such as current mirror and differential input stage. Each sub-circuit optimizer can be used for synthesis of analog cells such as OTA(operational transconductance amplifier), 2-stage OP-AMP and comparator. To reduce the time spending of the simulation-based synthesis we propose 2-stage searching scheme and simulation data reusing scheme. With those schemes the synthesis time spending of OTA was reduced from 301.05sec to 56.52sec by 81.12%. Since our synthesis system doesn't need other additional physical parameters except SPICE parameters, and is independent of the process and its model level, the time spending to port to other process is minimized. We synthesized OTA and 2-stage OP-AMP respectively with our approach to show its usefulness.

  • PDF

A Constant-gm Global Rail-to-Rail Operational Amplifier with Linear Relationship of Currents (전영역에서 선형 전류 관계를 갖는 일정 트랜스컨덕턴스 연산 증폭기의 설계)

  • Jang, Il-Gwon;Gwak, Gye-Dal;Park, Jang-U
    • Journal of the Institute of Electronics Engineers of Korea SC
    • /
    • v.37 no.2
    • /
    • pp.29-36
    • /
    • 2000
  • The principle and design of two-stage CMOS operational amplifier with rail-to-rail input and class-AB output stage is presented. The rail-to-rail input stage shows almost constant transconductance independent of the common mode input voltage range in global transistor operation region. This new technique does not make use of accurate current-voltage relationship of MOS transistors. Hence it was achieved by using simple linear relationship of currents. The simulated transconductance variation using SPICE is less the 4.3%. The proposed global two-stage opamp can operate both in strong inversion and in weak inversion. Class AB output stage proposed also has a full output voltage swing and a well-defined quiescent current that does not depend on power supply voltage. Since feedback class- AB control is used, it is expected that this output stage can be operating in extremely low voltage. The variation of DC-gain and unity-gain frequency is each 4.2% and 12%, respectively.

  • PDF

High Frame Rate CMOS Image Sensor with Column-wise Cyclic ADC (컬럼 레벨 싸이클릭 아날로그-디지털 변환기를 사용한 고속 프레임 레이트 씨모스 이미지 센서)

  • Lim, Seung-Hyun;Cheon, Ji-Min;Lee, Dong-Myung;Chae, Young-Cheol;Chang, Eun-Soo;Han, Gun-Hee
    • Journal of the Institute of Electronics Engineers of Korea SD
    • /
    • v.47 no.1
    • /
    • pp.52-59
    • /
    • 2010
  • This paper proposes a high-resolution and high-frame rate CMOS image sensor with column-wise cyclic ADC. The proposed ADC uses the sharing techniques of OTAs and capacitors for low-power consumption and small silicon area. The proposed ADC was verified implementing the prototype chip as QVGA image sensor. The measured maximum frame rate is 120 fps, and the power consumption is 130 mW. The power supply is 3.3 V, and the die size is $4.8\;mm\;{\times}\;3.5\;mm$. The prototype chip was fabricated in a 2-poly 3-metal $0.35-{\mu}m$ CMOS process.

Electronically adjustable gain instrumentation amplifier

  • Julprapa, A.;Chaikla, A.;Ukakimaparn, P.;Parnklang, J.;Suphap, S.;Reiwruja, V.
    • 제어로봇시스템학회:학술대회논문집
    • /
    • 2001.10a
    • /
    • pp.158.3-158
    • /
    • 2001
  • In this paper, an instrumentation amplifier, which the voltage gain can be electronically adjusted, is proposed. The realization method is based on the use of operational transconductance amplifiers (OTAs) as active circuit elements. The common mode rejection ratio (CMRR) of the proposed scheme is better than 93dB at the frequency of about 70kHz. The temperature effect to the circuit performance is also compensated. Experimental and simulation results demonstrating the characteristics of the proposed scheme are also included.

  • PDF