• 제목/요약/키워드: on-line elimination

검색결과 97건 처리시간 0.024초

직류옵셋제거필터에 의한 거리계전기법의 성능 개선에 관한 연구 (A Study on Performance Enhancement of Distance Relaying by DC Offset Elimination Filter)

  • 이경민;박유영;박철원
    • 전기학회논문지P
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    • 제64권2호
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    • pp.67-73
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    • 2015
  • Distance relay is widely used for the protection of long transmission line. Most of distance relay used to calculate line impedance by measuring voltage and current using DFT. So if there is a computation error due to the influence of phasor by DC offset component, due to excessive vibration by measuring line impedance, overreach or underreach can be occurs, and then abnormal and non-operation of distance relay can be issue. It is very important to implement the robust distance relaying that is not affected by DC offset component. This paper describes an enhanced distance relaying based on the DC offset elimination filter to minimize the effects of DC offset on a long transmission line. The proposed DC offset elimination filter has not need any prior information. The phase angle delay of the proposed DC offset filter did not occurred and the gain error was not found. The enhanced distance relay uses fault current as well as residual current. The behavior of the proposed distance relaying using off-line simulation has been verified using data about several fault conditions generated by the ATP simulation software.

1회선 송전선로 단락사고의 개선된 고장점 표정기법 (Enhanced Fault Location Algorithm for Short Faults of Transmission Line)

  • 이경민;박철원
    • 전기학회논문지
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    • 제65권6호
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    • pp.955-961
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    • 2016
  • Fault location estimation is an important element for rapid recovery of power system when fault occur in transmission line. In order to calculate line impedance, most of fault location algorithm uses by measuring relaying waveform using DFT. So if there is a calculation error due to the influence of phasor by DC offset component, due to large vibration by line impedance computation, abnormal and non-operation of fault locator can be issue. It is very important to implement the robust fault location algorithm that is not affected by DC offset component. This paper describes an enhanced fault location algorithm based on the DC offset elimination filter to minimize the effects of DC offset on a long transmission line. The proposed DC offset elimination filter has not need any erstwhile information. The phase angle delay of the proposed DC offset filter did not occurred and the gain error was not found. The enhanced fault location algorithm uses DFT filter as well as the proposed DC offset filter. The behavior of the proposed fault location algorithm using off-line simulation has been verified by data about several fault conditions generated by the ATP simulation program.

An On-Line Harmonic Elimination Pulse Width Modulation Scheme for Voltage Source Inverter

  • Salam, Zainal
    • Journal of Power Electronics
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    • 제10권1호
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    • pp.43-50
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    • 2010
  • This paper proposes a new harmonic elimination PWM (HEPWM) scheme for voltage source inverters (VSI) based on the curve fittings of certain polynomials functions. The resulting equations to calculate the switching angle of the HEPWM require only the addition and multiplication processes; therefore any number of harmonics to be eliminated and the fundamental amplitude of the pole switching waveform (NP1) can be controlled on-line. An extensive angle error analysis is carried out to determine the accuracy of the algorithm in comparison to the exact solution. To verify the workability of the technique, an experimental single phase VSI is constructed. The algorithm is implemented on a VSI using a 16-bit microprocessor. The results obtained from the test rig are compared to the theoretical prediction and the results of the MATLAB simulations.

지르칼로이-4의 저항업셋용접에서 용접선이 기계적성질에 미치는 영향과 그 소멸과정 (The Effect of Weld Line on the Mechanical Strengths and its Elimination Process in the Zr-4 Resistance Upset Welds)

  • Koh, Jin-Hyun;Lee, Jung-Won;Jung, Sung-Hoon
    • Nuclear Engineering and Technology
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    • 제23권1호
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    • pp.1-11
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    • 1991
  • 중수로형 핵연료봉단마개용접부의 품질검 사는 금속조직 검사에 따른 용접계면에 존재하는 불연속인 용접선(weld line) 길이가 가장 중요한 검사기준이다. 본 연구에서는 저항용접에서 가장 중요한 변수인 용접열의 변화에 따라 용접계면에서 용접선 소멸과 이 용접선이 용접부에 미치는 경향을 미세조직, 인장 및 파열시험으로 조사하였고, 또 주사전자현미경을 사용하며 파단면을 조사하였다. 용접열(main heat)의 변화에 따라 실제 용접에 사용된 전류와 업셋에 따른 시편길이 감소량은 증가하였으며 이들에 관한 상관관계식을 유도하였다. 용접열 50%근 용접된 용접부의 용접업셋 크기, 기계적 강도 및 용접선 소멸등을 고려한 결과 이것이 건전한 봉단마개 용접을 위한 임계치임을 알았다. 용접열을 50%에서 75%로 변화시킴에 따라 Zircaloy-4 용접부의 미세조직은 basketweave, Widmanstatten과 마르텐사이트로 변했고, 이는 용접시 최고도달 온도에 따라 냉각속도가 크게 변화했기 때문으로 사료된다. 인장시험에 의한 용접선 파단면에서 연성파괴의 dimple 형상은 2축응력에 의해 파열된 파단면의 dimple보다 크고 깊었음이 관찰되었다. 저항업셋용접부에서의 용접전류 증가에 따른 용접선의 소멸과정은 초기용접계면에 기공 존재, 이들의 수축과 소멸 및 초기계면 수축등 3단계로 구분할 수 있었다.

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Power line interference noise elimination method based on independent component analysis in wavelet domain for magnetotelluric signal

  • Cao, Xiaoling;Yan, Liangjun
    • Geosystem Engineering
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    • 제21권5호
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    • pp.251-261
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    • 2018
  • With the urbanization in recent years, the power line interference noise in electromagnetic signal is increasing day by day, and has gradually become an unavoidable component of noises in magnetotelluric signal detection. Therefore, a kind of power line interference noise elimination method based on independent component analysis in wavelet domain for magnetotelluric signal is put forward in this paper. The method first uses wavelet decomposition to change single-channel signal into multi-channel signal, and then takes advantage of blind source separation principle of independent component analysis to eliminate power line interference noise. There is no need to choose the layer number of wavelet decomposition and the wavelet base of wavelet decomposition according to the observed signal. On the treatment effect, it is better than the previous power line interference removal method based on independent component analysis. Through the de-noising processing to actual magnetotelluric measuring data, it is shown that this method makes both the apparent resistivity curve near 50 Hz and the phase curve near 50 Hz become smoother and steadier than before processing, i.e., it effectively eliminates the power line interference noise.

전원의 고조파 제거를 위한 Hybrid Filter의 실현 (Realization of Hybrid Filter for Harmonics Elimination on the Power line)

  • 방선배;정동열;황환영;박종연
    • 전력전자학회:학술대회논문집
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    • 전력전자학회 2004년도 전력전자학술대회 논문집(2)
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    • pp.764-768
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    • 2004
  • This paper proposed Hybrid Filter for harmonics elimilation on the power line. It's control method is very simple, but its performance is better than the results by passive filter. For the harmonics elimination, we improved the performance of the BPF(Band-pass Filter) with the GIC(Generalize Impedance Converter), and the new hysterisys controller.

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IPMSM 드라이브에서 전류 기울기 정보를 이용한 데드타임 및 인버터 비선형성 효과의 간단한 제거 기법 (Simple On-line Elimination Strategy of Dead Time and Nonlinearity in Inverter-fed IPMSM Drive Using Current Slope Information)

  • 박동민;김명복;김경화
    • 전력전자학회논문지
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    • 제17권5호
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    • pp.401-408
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    • 2012
  • A simple on-line elimination strategy of the dead time and inverter nonlinearity using the current slope information is presented for a PWM inverter-fed IPMSM (Interior Permanent Magnet Synchronous Motor) drive. In a PWM inverter-fed IPMSM drive, a dead time is inserted to prevent a breakdown of switching device. This distorts the inverter output voltage, resulting in a current distortion and torque ripple. In addition to the dead time, inverter nonlinearity exists in switching devices of the PWM inverter, which is generally dependent on operating conditions such as the temperature, DC link voltage, and current. The proposed scheme is based on the fact that the d-axis current ripple is mainly caused by the dead time and inverter nonlinearity. To eliminate such an influence, the current slope information is determined. The obtained current slope information is processed by the PI controller to estimate the disturbance caused by the dead time and inverter nonlinearity. The overall system is implemented using DSP TMS320F28335 and the validity of the proposed algorithm is verified through the simulation and experiments. Without requiring any additional hardware, the proposed scheme can effectively eliminate the dead time and inverter nonlinearity even in the presence of the parameter uncertainty.

패션 일러스트레이션에 나타난 얼굴해체 - 프란시스 베이컨 회화의 얼굴해체를 바탕으로 - (An analysis on the Deconstructed Visage in Fashion Illustration - Based on the Deconstructed Visage of Francis Bacon's Painting -)

  • 최정화;최유진
    • 한국의류산업학회지
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    • 제15권6호
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    • pp.874-885
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    • 2013
  • This study analyzes the visage in fashion illustration based on the deconstructed visage of Francis Bacon's paintings as well as analyzes fashion illustration works since 2000. The deconstructed visages in Francis Bacon's paintings are classified as blurring, elimination, distortion and division. The expressive methods and meanings in fashion illustration (according to categorization) are as follow. Blurring shows an ambiguous visage organ by the sweeping of the brush, removal of a boundary among the visage, body and clothes, gradation of organic line like visage shapes, stretching of the a plat combined to visage and fragmentation of visage. It represents an uncertainty of the fashion theme and image interpretation, impossibility of figure by ambiguity, fantastic effect and the induction of the uncanny. Elimination shows the background color's painting of a photo-montage, overlap of a cutting of visage's part and background of a plat, elimination of the visage and the elimination of eyes, nose or lips. It represents a weakened identity, the reinforcement of anonymity, creation of a violent image, and uncanny unfamiliarity. Distortion shows a distorted visage by free drawing, and unconscious drawing line, fluid digital body, combination of an unconscious curve, and an eccentric combination of the accidental. It represents the relief of specialty about realistic existence, hypothetical immateriality and fantasy. Division shows overlapped visages with different angles, the weird combination of a plural visage and different species and a plural breakaway of direction, and the position of several organs. It represents motion by power's trace, non-territory of species, ambiguity and uncertainty and the uncanny.

GAUSS 소거법을 이용한 초음파 트랜스듀서의 지향성합성 SIMULATION (Directivity Synthesis Simulation of Ultrasonic Transducer Using Gauss Elimination Method)

  • 이정남;조기량;이진선;이문수
    • 한국전자파학회지:전자파기술
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    • 제6권4호
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    • pp.20-27
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    • 1995
  • 본 논문에서는 직선 배열 응원에 의한 초음파 트랜스듀서의 목적 지향성에 대한 Beam forming을 Gauss 소거법을 이용하여 수치 계산하였다. 하나의 System으로 여러 가지의 조건에 대한 지향성 합성의 실현을 목적으로 하였으며, 목적 지향성으로는 계산에 의해 합성된 선음원에 의한 지향성과 임의로 설정한 Beam 폭의 변화와 방사 방향의 회전에 대한 준이상 Beam을 선택하여 지향성 합성을 시융레이션 하였다. 수치 계산에는 PC(CPU: 80486DX2, RAM 16Mbyte)를 이용하였으며, 수치 계산 결과, 반복법(LMS볍, DFP볍)에 비해 훨씬 빠른 지향성 합성이 가능하고, 또 System 안정도 면에서도 매우 양호함을 확인했다.

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3상 오프라인 무정전 전원 시스템의 돌입전류 제거 (Inrush Current Elimination for a Three-Phase Off-Line UPS System)

  • ;권병일
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 2015년도 제46회 하계학술대회
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    • pp.944-945
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    • 2015
  • Many sensitive loads always rely on UPS systems to maintain continuous power during abnormal utility power conditions. As any disturbance occurs at the utility side, an off-line UPS system takes over the load within a quarter cycle to avoid a blackout. However, the starting of the inverter can root the momentous inrush current for the transformer installed before the load, due to its magnetic saturation. The consequences of this current can be a reduction of line voltage and tripping of protective devices of the UPS system. Furthermore, it can also damage the transformer and decrease its lifetime by increasing the mechanical stresses on its windings. To prevent the inrush current, and to avoid its disruptive effects, this paper proposes an off-line UPS system that eliminates the inrush current phenomenon while powering the transformer coupled loads, using a current regulated voltage source inverter (CRVSI) instead of a typical voltage source inverter (VSI). Simulations have been performed to validate the operation of proposed off-line UPS system.

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