• Journal of the Institute of Electronics Engineers of Korea CI
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• v.47 no.5
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• pp.41-49
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• 2010

Being popularized the use of portable entertainment/information devices, the demand on flash memory has been also increased radically. In general, flash memory reveals various error patterns by the devices it is mounted, and thus the memory makers are trying to minimize error ratio in the final process through not only the electric test but also the data integrity test under the same condition as real application devices. This process is called an application-level memory test. Though currently various flash memory testing devices have been used in the production lines, most of the works related to memory test depend on the sensual abilities of human testers. In case of testing the flash memory for MP3 devices, the human testers are checking if the memory has some errors by hearing the audio played on the memory testing device. The memory testing process like this has become a bottleneck in the flash memory production line. In this paper, we propose an audio comparison technique to support the efficient flash memory test for MP3 devices. The technique proposed in this paper compares the variance change rate between the source binary file and the decoded analog signal and checks automatically if the memory errors are occurred or not.

• Proceedings of the Korean Vacuum Society Conference
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• 2016.02a
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• pp.231-232
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• 2016

We have fabricated the nc-Si, IGZO based nonvolatile memory TFTs using mobile protons, which can be generated by simple hydrogen insertion process via H-NB treatment at room temperature. The TFT devices above exhibited reproducible hysteresis behavior, stable ON/OFF switching, and non-volatile memory characteristics. Also executed hydrogen treatment in order to figure out the difference of mobile proton generation between PECVD and our modified H-NB CVD. The room temperature proton-insertion process can reveal flexible inorganic based all-in-one display panel including driving circuit and memory circuit.

• Proceedings of the IEEK Conference
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• 2008.06a
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• pp.481-482
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• 2008

In this paper, the advanced process has been presented to remove the WSix peeling that was made in sub 100nm DRAM SRCAT(Sphere-shaped-Recess-Ch annel-Array Transistor). The source of WSix peeling was proved to be the groove of gate poly film. We have completely solved the problems to adopt the gate-poly CMP (Chemical Mechanical Polishing) process.

• Electrical & Electronic Materials
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• v.13 no.12
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• pp.6-9
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• 2000

Over the years of decades, the memory technology has progressed a long, marble way. As we have evidenced from the Intel's 1Kb DRAM in 1970 to the Gigabit era of 2000's, the road further ahead towards the Terabit era will be unfolded. The technology once perceived inconceivable is in realization today, and similarly roadblocks as we know of today mayvecome trivial issues for tomorrow. For the inquiring mind, the question is how the "puzzle"of tomorrow's memory technology is pieced-in today. The process will take place both in evolutionary and revolutionary ways. Among these, note-worthy are the changes in DRAM architecture and the cell process technology. In this paper, some technical approaches will be discussed to bring these aspects into a general overview and a per-spective with possibilities for the new memory technology will be presented.presented.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2000.07a
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• pp.17-20
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• 2000

Over the years of decades, the memory technology has progressed a long, marble way. As we have evidenced from the Intel’s 1Kb DRAM in 1970 to the Gigabit era of 2000’s, the road further ahead towards the Terabit era will be unfolded. The technology once perceived inconceivable is in realization today, and similarly roadblocks as we know of today may become trivial issues for tomorrow. For the inquiring mind, the question is how the “puzzle” of tomorrow’s memory technology is pieced-in today. The process will take place both in evolutionary and revolutionary ways. Among these, note-worthy are the changes in DRAM architecture and the cell process technology. In this paper, some technical approaches will be discussed to bring these aspects into a general overview and a perspective with possibilities for the new memory technology will be presented.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2005.07a
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• pp.40-41
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• 2005

In this study, we proposed CMP micro-scratches generated by contaminative particle which existed on the wafer surface prior to CMP process. The CMP micro-scratches are one of the slurry abrasive related damage. To reduce the micro-scratches, research efforts have been devoted to the optimization of slurry abrasive size distribution. In addition of slurry abrasive, it was found that contaminative particles also were major CMP micro-scratch source.

• ETRI Journal
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• v.43 no.1
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• pp.141-151
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• 2021

Several methods exist for detecting hacking programs operating within online games. However, a significant amount of computational power is required to detect the illegal access of a hacking program in game clients. In this study, we propose a novel detection method that analyzes the protected memory area and the hacking program's process in real time. Our proposed method is composed of a three-step process: the collection of information from each PC, separation of the collected information according to OS and version, and analysis of the separated memory information. As a result, we successfully detect malicious injected dynamic link libraries in the normal memory space.

• The Korean Journal of Physiology and Pharmacology
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• v.16 no.5
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• pp.293-296
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• 2012

Memory reconsolidation is ubiquitous across species and various memory tasks. It is a dynamic process in which memory is modified and/or updated. In experimental conditions, memory reconsolidation is usually characterized by the fact that the consolidated memory is disrupted by a combination of memory reactivation and inhibition of protein synthesis. However, under some experimental conditions, the reactivated memory is not disrupted by inhibition of protein synthesis. This so called "boundary condition" of reconsolidation may be related to memory strength. In Pavlovian fear conditioning, the intensity of unconditional stimulus (US) determines the strength of the fear memory. In this study, we examined the effect of the intensity of US on the reconsolidation of contextual fear memory. Strong contextual fear memory, which is conditioned with strong US, is not disrupted by inhibition of protein synthesis after its reactivation; however, a weak fear memory is often disrupted. This suggests that a US of strong intensity can inhibit reconsolidation of contextual fear memory.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.44 no.12
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• pp.61-70
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• 2007

The density of Memory has been increased by great challenge for memory technology. Therefore, elements of memory become more smaller than before and the sensitivity to faults increases. As a result of these changes, memory testing becomes more complex. In addition, as the number of storage elements per chip increases, the test cost becomes more remarkable as the cost per transistor drops. Recent development in system-on-chip (SOC) technology makes it possible to incorporate large embedded memories into a chip. However, it also complicates the test process, since usually the embedded memories cannot be controlled from the external environment. Proposed design doesn't need controls from outside environment, because it integrates into memory. In general, there are a variety of memory modules in SOC, and it is not possible to test all of them with a single algorithm. Thus, the proposed scheme supports the various memory testing process. Moreover, it is able to At-Speed test in a memory module. consequently, the proposed is more efficient in terms of test cost and test data to be applied.

• The Korean Journal of Archival Studies
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• no.67
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• pp.267-318
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• 2021

The purpose of this study is to analyze how the "memory approach" has affected archival methodology and activities, and suggest the directions of archival activities in each field. Although there have been many discussions on the memories and collective memories in Archival Studies, it is necessary to analyze them more practically from the viewpoint of archival activism. In this study, the memory approaches in archival discourse are classified into four categories in terms of archival activism; i) the role of archives as social memory organizations, ii) the memory struggle for finding out the truth of the past, iii) archival activities of restorative justice for people who suffer from trauma memories after social disasters and human rights violations, and iv) the memory process of communities' archiving for strengthening community identities. The meaning and issues are analyzed for each category, and the practice based on archival expertise and political and social practices are examined together as necessary competencies for archival activism.