• Applied Chemistry for Engineering
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• v.23 no.6
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• pp.515-520
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• 2012

In this review, the fabrication of silicon based memory capacitor and organic memory thin film transistors (TFTs) was discussed for their potential identification tag applications and biosensor applications. Metal or non-metal nanoparticles (NPs) could be capped with chemicals or biomolecules such as protein and oligo-DNA, and also be self-assembly monolayered on corresponding target biomolecules conjugated dielectric layers. The monolayered NPs were formed to be charging elements of a nano floating gate layer as forming organic memody deivces. In particular, the strong and selective binding events of the NPs through biomolecular interactions exhibited effective electrostatic phenomena in memory capacitors and TFTs formats. In addition, memory devices fabricated as organic thin film transistors (OTFTs) have been intensively introduced to facilitate organic electronics era on flexible substrates. The memory OTFTs could be applicable eventually to the development of new conceptual devices.

• Journal of the Korean Vacuum Society
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• v.21 no.6
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• pp.354-361
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• 2012

The organic memory device was made by the plasma polymerization method which was not the dry process but the wet process. The memory device consist of the styrene and MMA monomer as the insulating layer, MMA monomer as the tunneling layer and Au thin film as the memory layer which was fabricated by thermal evaporation method. The I-V characteristics of fabricated memory device got the hysteresis voltage of 27 V at 40/-40 V double sweep measuring conditions. At this time, the optimized structure was 7 nm of Au thin film as floating gate, 400 nm of styrene thin film as insulating layer and 30 nm of MMA thin film as tunneling layer. Therefore we got the charge trapping characteristics by the hysteresis voltage. From the paper, styrene indicated a good charge trapping characteristics better than MMA. In the future, we expect to make devices by using styrene thin film rather than Au thin film.

• Journal of the Korean Vacuum Society
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• v.22 no.3
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• pp.131-137
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• 2013

The thin insulator films for organic memory device were made by the plasma polymerization method using the styrene monomer which was not the wet process but the dry process. For the formation of stable plasma, we make an effort for controlling the monomer with bubbler and circulator system. The thickness of plasma polymerized styrene insulator layer was 430 nm, the thickness of the Au memory layer was 7 nm thickness of plasma polymerized styrene tunneling layer was 30, 60 nm, the thickness of pentacene active layer was 40 nm, the thickness of source and drain electrodes were 50 nm. The I-V characteristics of fabricated memory device got the hysteresis voltage of 45 V at 40/-40 V double sweep measuring conditions. If it compared with the results of previous paper which was the organic memory with the plasma polymerized MMA insulation thin film, this result was greater than 18 V, the improving ratio is 60%. From the paper, styrene indicated a good charge trapping characteristics better than MMA. In the future, we expect to make the organic memory device with plasma polymerized styrene as the memory thin film.

• Proceedings of the Korean Vacuum Society Conference
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• 2013.02a
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• pp.467-467
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• 2013

유기물/무기물 나노복합체는 메모리, 트렌지스터, 발광 다이오드, 태양 전지 소자에 응용이 시도되고 있으나 유기물의 물리적인 특성 때문에 전류 전송 메커니즘 규명에는 충분한 연구가 진행되어 있지 못하다. 유기물/무기물 나노복합소재를 기반으로 차세대 광학소자나 비휘발성 메모리 소자에 대한 연구가 활발히 진행되고 있으며, 기억소자의 성능 향상을 위하여 여러 가지 유기물/무기물 나노복합소재를 사용하여 제작한 유기 쌍안정성 소자가 차세대 플렉서블 비휘발성 기억소자로 대두되고 있다. 유기 쌍안정성 소자는 비휘발성 기억 소자 중에서 구조가 간단하고 제작비용이 저렴하며 유연성을 가지기 때문에 많은 연구가 진행되고 있다. 많은 장점에도 불구하고 유기물에 관한 많은 연구가 이루어지지 않았기 때문에 소자의 동작특성, 재연성 등의 문제점이 있다. 본 연구에서는 유기 쌍 안정성 소자의 전기적 특성을 연구하기 위하여 ZnO 나노입자를 포함한 PMMA 복합층을 사용하여 소자를 제작하고 전기적 특성을 측정하였으며, 유기물/무기물 나노복합소재의 전류 전송 메커니즘을 이론적으로 규명하였다. 트랩밀도 변화가 유기 쌍안정성 소자에 미치는 영향을 연구하기 위하여 C60 층을 삽입하였고, 그 결과 C60이 삽입된 유기 쌍안정성 소자가 향상된 메모리 특성을 보였다. 소자의 제작은 Indium tin oxide가 증착된 유리 기판위에 C60 층을 스핀코팅 방법으로 적층하였다. ZnO 나노 입자와 PMMA를 혼합하여 스핀코팅 방법으로 C60층 위에 박막을 형성한 후, 전극으로 Al을 열증착으로 형성하였다. Space charge limitted current 메커니즘을 이용하여 simulation을 수행하였고 이를 current density - voltage (J-V) 특성과 비교 분석하였다. J-V 특성 결과, simulation결과, 소자의 구조를 통해 유기물/무기물 나노복합소재 기반 메모리 소자의 쓰기, 지우기 및 읽기 동작에 대한 과정을 설명하였다. 또한 C60층을 삽입한 유기물/무기물 나노복합소자를 이용하여 트랩 밀도 변화가 유기 쌍안정성 소자의 전기적 특성에 미치는 영향을 연구하였다.

• Proceedings of the Korean Vacuum Society Conference
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• 2013.08a
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• pp.195.2-195.2
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• 2013

플라즈마 중합 증착기술을 이용하여 ppMMA (plasma polymerized methyl methacrylate) 및 ppS (plasma polymerized styrene) 박막을 제작하고, ppMMA를 게이트 절연층, polymer electret인 ppS를 메모리층으로 한 전계효과트랜지스터 기반 유기 메모리 소자를 제작하였다. 메모리층인 ppS의 두께를 각각 30, 60, 90 nm로 달리한 유기 메모리 소자가 C-V 및 I-V 특성에서 나타내는 히스테리시스 현상을 분석하여 메모리 특성을 평가했으며, 메모리층의 두께 변화에 따른 유기 메모리 소자의 성능을 비교분석하였다.

• Polymer Science and Technology
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• v.19 no.3
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• pp.233-240
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• 2008

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• v.9 no.1
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• pp.981-984
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• 2005

This study is to realize its threshold voltage shift after programming operation in charge trap type SONOS memory by simulation. SONOS devices are charge trap type nonvolatile memory devices in which charge storage takes place in traps in the nitride-blocking oxide interface and the nitride layer. For simulation of their threshold voltage as a function of the memory states, traps in the nitride layer have to be defined. However, trap models in the nitride layer are not developed in commercial simulator. So, we propose a new method that can simulate their threshold voltage shift by an amount of charges induced to the electrodes as a function of a programming voltages and times as define two electrodes in the tunnel oxide-nitride interface and the nitride-blocking oxide interface of SONOS structures.

• Proceedings of the IEEK Conference
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• 2006.06a
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• pp.483-484
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• 2006

In this paper, we fabricated the organic bi-stable devices under the different condition from the other groups and analyzed the electrical characteristics. Then we investigated the effects of the device structure such as organic layer thickness, middle metal layer thickness and middle metal layer deposition rate on the memory characteristics.

• 한국전자현미경학회:학술대회논문집
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• 2005.11a
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• pp.80-84
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• 2005

• Journal of the Korean Vacuum Society
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• v.20 no.5
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• pp.327-332
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• 2011

Plasma polymerized styrene (ppS) thin films were prepared on ITO coated glass substrates for a MIM (metal-insulator-metal) structure with thermally evaporated Au thin film as metal contact. Also the ppS thin films were applied as organic insulator to a MIS (metal-insulatorsemiconductor) device with thermally evaporated pentacene thin film as organic semiconductor layer. After the I-V and C-V measurements with MIM and MIS structures, the ppS revealed relatively higher dielectric constant of k=3.7 than those of the conventional poly styrene and very low leakage current density of $1{\times}10^{-8}Acm^{-2}$ at electric field strength of $1MVcm^{-1}$. The MIS structure with the ppS dielectric layer showed negligible hysteresis in C-V characteristics. It would be therefore expected that the proposed ppS could be applied as a promising dielectric/insulator to organic thin film transistors, organic memory devices, and flexible organic electronic devices.