• Clean Technology
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• v.27 no.4
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• pp.277-290
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• 2021

A supercapacitor, also called an ultracapacitor or an electrochemical capacitor, stores electrochemical energy by the adsorption/desorption of electrolytic ions or a fast and reversible redox reaction at the electrode surface, which is distinct from the chemical reaction of a battery. A supercapacitor features high specific power, high capacitance, almost infinite cyclability (~ 100,000 cycle), short charging time, good stability, low maintenance cost, and fast frequency response. Supercapacitors have been used in electronic devices to meet the requirements of rapid charging/discharging, such as for memory back-up, and uninterruptible power supply (UPS). Also, their use is being extended to transportation and large industry applications that require high power/energy density, such as for electric vehicles and power quality systems of smart grids. In power generation using intermittent power sources such as solar and wind, a supercapacitor is configured in the energy storage system together with a battery to compensate for the relatively slow charging/discharging time of the battery, to contribute to extending the lifecycle of the battery, and to improve the system power quality. This article provides a concise overview of the principles, mechanisms, and classification of energy storage of supercapacitors in accordance with the electrode materials. Also, it provides a review of the status of recent research and patent, product, and market trends in supercapacitor technology. There are many challenges to be solved to meet industrial demands such as for high voltage module technologies, high efficiency charging, safety, performance improvement, and competitive prices.

• Journal of the Institute of Electronics and Information Engineers
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• v.51 no.9
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• pp.82-90
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• 2014

In this paper, a couple of 4-channel differential transimpedance amplifier arrays are realized in a standard 0.18um CMOS technology for the applications of linear LADAR(laser detection and ranging) systems. Each array targets 1.25-Gb/s operations, where the current-mode chip consists of current-mirror input stage, a single-to-differential amplifier, and an output buffer. The input stage exploits the local feedback current-mirror configuration for low input resistance and low noise characteristics. Measurements demonstrate that each channel achieves $69-dB{\Omega}$ transimpedance gain, 2.2-GHz bandwidth, 21.5-pA/sqrt(Hz) average noise current spectral density (corresponding to the optical sensitivity of -20.5-dBm), and the 4-channel total power dissipation of 147.6-mW from a single 1.8-V supply. The measured eye-diagrams confirms wide and clear eye-openings for 1.25-Gb/s operations. Meanwhile, the voltage-mode chip consists of inverter input stage for low noise characteristics, a single-to-differential amplifier, and an output buffer. Test chips reveal that each channel achieves $73-dB{\Omega}$ transimpedance gain, 1.1-GHz bandwidth, 13.2-pA/sqrt(Hz) average noise current spectral density (corresponding to the optical sensitivity of -22.8-dBm), and the 4-channel total power dissipation of 138.4-mW from a single 1.8-V supply. The measured eye-diagrams confirms wide and clear eye-openings for 1.25-Gb/s operations.