• Proceedings of the KIEE Conference
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• 1999.07d
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• pp.1928-1930
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• 1999

This paper describes on the growth of a ${\mu}c$-Si:H film on low cost substrate like glass by Hot Wire CVD method. The ${\mu}c$-Si:H film, prepared in 50mTorr pressure, $1800^{\circ}C$ wire temperature, and $H_2/SiH_4$ 10 showed three clear peaks. (111), (220), and (311) in X-ray spectroscopy. The crystallite size and crystalline volume fraction, calculated from Raman spectroscopy, was about 6nm and 70%, respectively. The FTIR transmission spectra of the film showed a different absorption peak with a-Si:H film around $2000-2100cm^{-1}$.

• Journal of the Korean Society for Heat Treatment
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• v.23 no.2
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• pp.83-89
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• 2010

Diamond-like carbon (DLC) coating was studied to be a good tribological problem-solver due to its low friction characteristics and high hardness. However, generally hydrogenated DLC film has shown a weak thermal stability above $300^{\circ}C$. However, the silicon doping DLC process by DC pulse plasma enhanced chemical vapor deposition (PECVD) for the new DLC coating which has a good characterization with thermal stability at high temperature itself has been observed. And we were discussed a process for optimizing silicon content to promote a good thermal stability using various tetramethylsilane (TMS) and methane gas at high-temperature. The chemical compositions of silicon-containing DLC film was analyzed using X-ray photoelectron spectroscopy (XPS) before and after heat treatment. Raman spectrum analysis showed the changed structure on the surface after the high-temperature exposure testing. In particular, the hardness of silicon-containing DLC film showed different values before and after the annealing treatment.

• Proceedings of the Korean Institute of Surface Engineering Conference
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• 2016.11a
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• pp.181-181
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• 2016

Hydrogenated microcrystalline silicon (${\mu}c-Si:H$) films have attracted much attention as materials of the bottom-cells in Si thin film tandem photovoltaics due to their low bandgap and excellent stability against light soaking. However, in PECVD, the source gas $SiH_4$ must be highly diluted by $H_2$, which eventually results in low deposition rate. Moreover, it is known that high-rate ${\mu}c-Si:H$ growth is usually accompanied by a large number of dangling-bond (DB) defects in the resulting films, which act as recombination centers for photoexcited carriers, leading to a deterioration in the device performance. During film deposition, Si nanoparticles generated in $SiH_4$ discharges can be incorporated into films, and such incorporation may have effects on film properties depending on the size, structure, and volume fraction of nanoparticles incorporated into films. Here we report experimental results on the effects of nonoparticles incorporation at the different substrate temperature studied using a multi-hollow discharge plasma CVD method in which such incorporation can be significantly suppressed in upstream region by setting the gas flow velocity high enough to drive nanoparticles toward the downstream region. All experiments were performed with the multi-hollow discharge plasma CVD reactor at RT, 100, and $250^{\circ}C$, respectively. The gas flow rate ratio of $SiH_4$ to $H_2$ was 0.997. The total gas pressure P was kept at 2 Torr. The discharge frequency and power were 60 MHz, 180 W, respectively. Crystallinity Xc of resulting films was evaluated using Raman spectra. The defect densities of the films were measured with electron spin resonance (ESR). The defect density of fims deposited in the downstream region (with nonoparticles) is higher defect density than that in the upstream region (without nanoparticles) at low substrate temperature of RT and $100^{\circ}C$. This result indicates that nanoparticle incorporation can change considerably their film properties depending on the substrate temperature.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2008.05a
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• pp.105-110
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• 2008

We have proposed a new structure of poly-silicon thin film transistor(TFT) which was fabricated the LDD region using doping oxide with graded spacer by etching shape retio. The devices of n-channel poly-si TFT's hydrogenated by $H_2$ and $HT_2$/plasma processes are fabricated for the devices reliability. We have biased the devices under the gate voltage stress conditions of maximum leakage current. The parametric characteristics caused by gate voltage stress conditions in hydrogenated devices are investigated by measuring /analyzing the drain current, leakage current, threshold voltage($V_{th}$), sub-threshold slope(S) and transconductance($G_m$) values. As a analyzed results of characteristics parameters, the degradation characteristics in hydrogenated n-channel polysilicon TFT's are mainly caused by the enhancement of dangling bonds at the poly-Si/$SiO_2$ interface and the poly-Si Brain boundary due to dissolution of Si-H bonds. The structure of novel proposed poly-Si TFT's are the simplity of the fabrication process steps and the decrease of leakage current by reduced lateral electric field near the drain region.

• Proceedings of the KIEE Conference
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• 1999.07d
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• pp.1514-1516
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• 1999

This paper covers our efforts to improve the low carrier mobility and light instability of hydrogenated amorphous silicon (a-Si:H) films with microcrystalline silicon $({\mu}c-Si)$ films. We successfully prepared ${\mu}c-Si$ films on $CaF_2$/glass substrate by decomposition of $SiH_4$ in RPCVD system. The $CaF_2$ films on glass served as a seed layer for ${\mu}c-Si$ film growth. The XRD analysis on $CaF_2$/glass illustrated a (111) preferred $CaF_2$ grains with the lattice mismatch less than 5 % of Si. We achieved ${\mu}c-Si$ films with a crystalline volume fraction of 61 %, (111) and (220) crystal orientations. grain size of $706\AA$, activation energy of 0.49 eV, and Photo/dark conductivity ratio of 124. By using a $CaF_2$/glass structure. we were able to achieve an improved ${\mu}c-Si$ films at a low substrate temperature of $300^{\circ}C$.

• Korean Journal of Metals and Materials
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• v.46 no.11
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• pp.762-769
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• 2008

Hydrogenated amorphous silicon(a-Si : H) layers, 120 nm and 50 nm in thickness, were deposited on 200 $nm-SiO_2$/single-Si substrates by inductively coupled plasma chemical vapor deposition(ICP-CVD). Subsequently, 30 nm-Ni layers were deposited by E-beam evaporation. Finally, 30 nm-Ni/120 nm a-Si : H/200 $nm-SiO_2$/single-Si and 30 nm-Ni/50 nm a-Si:H/200 $nm-SiO_2$/single-Si were prepared. The prepared samples were annealed by rapid thermal annealing(RTA) from $200^{\circ}C$ to $500^{\circ}C$ in $50^{\circ}C$ increments for 30 minute. A four-point tester, high resolution X-ray diffraction(HRXRD), field emission scanning electron microscopy (FE-SEM), transmission electron microscopy (TEM), and scanning probe microscopy(SPM) were used to examine the sheet resistance, phase transformation, in-plane microstructure, cross-sectional microstructure, and surface roughness, respectively. The nickel silicide on the 120 nm a-Si:H substrate showed high sheet resistance($470{\Omega}/{\Box}$) at T(temperature) < $450^{\circ}C$ and low sheet resistance ($70{\Omega}/{\Box}$) at T > $450^{\circ}C$. The high and low resistive regions contained ${\zeta}-Ni_2Si$ and NiSi, respectively. In case of microstructure showed mixed phase of nickel silicide and a-Si:H on the residual a-Si:H layer at T < $450^{\circ}C$ but no mixed phase and a residual a-Si:H layer at T > $450^{\circ}C$. The surface roughness matched the phase transformation according to the silicidation temperature. The nickel silicide on the 50 nm a-Si:H substrate had high sheet resistance(${\sim}1k{\Omega}/{\Box}$) at T < $400^{\circ}C$ and low sheet resistance ($100{\Omega}/{\Box}$) at T > $400^{\circ}C$. This was attributed to the formation of ${\delta}-Ni_2Si$ at T > $400^{\circ}C$ regardless of the siliciation temperature. An examination of the microstructure showed a region of nickel silicide at T < $400^{\circ}C$ that consisted of a mixed phase of nickel silicide and a-Si:H without a residual a-Si:H layer. The region at T > $400^{\circ}C$ showed crystalline nickel silicide without a mixed phase. The surface roughness remained constant regardless of the silicidation temperature. Our results suggest that a 50 nm a-Si:H nickel silicide layer is advantageous of the active layer of a thin film transistor(TFT) when applying a nano-thick layer with a constant sheet resistance, surface roughness, and ${\delta}-Ni_2Si$ temperatures > $400^{\circ}C$.

• Proceedings of the Korean Vacuum Society Conference
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• 2014.02a
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• pp.341.1-341.1
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• 2014

In the advanced material for the next generation display device, transparent amorphous oxide semiconductors (TAOS) are promising materials as a channel layer in thin film transistor (TFT). The TAOS have many advantages for large-area application compared with hydrogenated amorphous silicon TFT (a-Si:H) and organic semiconductor TFT. For the reasonable characteristics of TAOS, The a-IGZO has the excellent performances such as low temperature fabrication (R.T~), high mobility, visible region transparent, and reasonable on-off ratio. In this study, we investigated how the electric characteristics and physical properties are changed as various oxygen ratio when magnetron sputtering. we analysis a-IGZO film by AFM, EDS and I-V measurement. decreasing the oxygen ratio, the threshold voltage is shifted negatively and mobility is increasing. Through this correlation, we confirm the effect of oxygen ratio. We fabricated the bottom-gate a-IGZO TFTs. The gate insulator, SiO2 film was grown on heavily doped silicon wafer by thermal oxidation method. a-IGZO channel layer was deposited by RF magnetron sputtering. and the annealing condition is $350^{\circ}C$. Electrode were patterned Al deposition through a shadow mask(160/1000 um).

• Transactions on Electrical and Electronic Materials
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• v.10 no.3
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• pp.75-79
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• 2009

An intrinsic silicon thin film passivation layer is deposited by the microwave remote-plasma enhanced chemical vapor deposition at temperature of $175^{\circ}C$ and various gas ratios for solar cell applications. The good quality amorphous silicon films were formed at silane $(SiH_4)$ gas flow rates above 15 seem. The highest effective carrier lifetime was obtained at the $SiH_4$, flow rate of 20 seem and the value was about 3 times higher compared with the bulk lifetime of 5.6 ${\mu}s$ at a fixed injection level of ${\Delta}n\;=\;5{\times}10^{14}\;cm^{-3}$. An annealing treatment was performed and the carrier life times were increased approximately 5 times compared with the bulk lifetime. The optimal annealing temperature and time were obtained at 250 $^{\circ}C$ and 60 sec respectively. This indicates that the combination of the deposition of an amorphous thin film at a low temperature and the annealing treatment contributes to the excellent surface and bulk passivation.

• Transactions on Electrical and Electronic Materials
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• v.1 no.2
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• pp.7-11
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• 2000

a-Si:H and poly-Si TFT(thin film transistor) characteristics were investigated using an inverted staggered type TFT. The TFT an as-grown a-Si:H exhibited a low field effect mobility, transconductance, and high gate threshold voltage. The poly-Si films were achieved by using an isothermal and RTA treatment for glow discharge deposited a-Si:H films. The a-Si:H films were cystallized at the various temperature from 600$^{\circ}C$ to 1000$^{\circ}C$. As anneal temperature was elevated, the TFT exhibited increased g$\sub$m/ and reduced V$\sub$ds/. V$\sub$T/. The poly-Si grain boundary passivation with grain boundary trap types and activation energies as a function of anneal temperature. The poly-si TFT showed an improved I$\sub$nm//I$\sub$off/ ratio of 10$\^$6/, reduced gate threshold voltage, and increased field effect mobility by three orders.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.9 no.2
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• pp.303-310
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• 2008

We fabricated hydrogenated amorphous silicon(a-Si:H) 140 nm thick film on a $180\;nm-SiO_2/Si$ substrate with an inductively-coupled plasma chemical vapor deposition(ICP-CVD) equipment at $250^{\circ}C$. Moreover, 30 nm-Ni film was deposited with a thermal-evaporator sequently. Then the film stack was annealed to induce silicides by a rapid thermal annealer(RTA) at $200{\sim}500^{\circ}C$ in every $50^{\circ}C$ for 30 minuets. We employed a four-point tester, high resolution X-ray diffraction(HRXRD), field emission scanning electron microscope(FE-SEM), transmission electron microscope(TEM), and scanning probe microscope(SPM) in order to examine the sheet resistance, phase transformation, in-plane microstructure, cross-sectional microstructure evolution, and surface roughness, respectively. We confirmed that nano-thick high resistive $Ni_3Si$, mid-resistive $Ni_2Si$, and low resistive NiSi phases were stable at the temperature of <300, $350{\sim}450^{\circ}C$, and >$450^{\circ}C$, respectively. Through SPM analysis, we confirmed the surface roughness of nickel silicide was below 12 nm, which implied that it was superior over employing the glass and polymer substrates.