• Journal of Biosystems Engineering
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• 제30권3호
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• pp.147-154
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• 2005

The improved hitch device, which connecting the trailer to power tiller, was developed. This device, composed with spring and rubber, could reduce the vibration and shock levels during driven on off-road. The vertical vibration accelerations for the improved hitch device were measured at 6 positions, i.e. engine, hitch, seat, and three points in trailer (front, middle, and rear) for not driving but at low engine speed of 500 rpm, and compared with the existing hitch device. The results of this study could be summarized as follows; The average vibration acceleration up to 120 Hz was $0.4m/s^2$ at engine part, but it was 0.08 and $0.05m/s^2$ at trailer for existing and improved hitch device, respectively. About $38\%$ of average acceleration level could be absorbed for the improved hitch device compared with existing hitch device. The average vibration acceleration up to 40 Hz was reduced to 0.12 and $0.06m/s^2$ at trailer for existing and improved hitch device respectively, showing the reduction effect of $50\%$. The maximum acceleration occurred at up to 20 Hz of low frequency was much higher than total acceleration occurred at up to 120 Hz, which means that much loss or damage could be occurred during transporting of agricultural products on off-road. The portions of average acceleration occurred at up to 20 Hz of low frequency were $27\%\;and\;21\%$ for the existing and improved hitch device, respectively.

• 융합신호처리학회논문지
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• 제16권3호
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• pp.115-121
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• 2015

가정 및 사무실의 전기/전자 기기가 내부 혹은 외부로부터 주 기능 수행을 위한 명령을 기다리고 있는 상태에서 소모되는 대기전력을 차단할 수 있는 장치를 저가로 개발하였다. 대기전력을 줄이기 위한 노력이 선진국들뿐만 아니라 국제적 차원에서 경주되고 있다. 우리나라도 가구당 전자/전기기기 보유대수가 증가되는 추세에 따른 대기전력이 점차 증가하고 있어 전기 에너지 낭비의 큰 요인이 되고 있다. 기존의 대기전력 차단장치는 그 장치 자체의 소비전력이 크고, 구조가 복잡하여 사용 의미를 퇴색시키는 문제점을 안고 있다. 본 논문에서는 기존 제품의 이러한 문제점을 보완시키고 대기전력을 완전히 차단하는 저가형 대기전력 차단장치를 제안한다. 그리고 제안한 대기전력 차단장치를 누전차단기와 콘센트에 적용하여 회로를 설계 및 구현하고 실험을 통하여 그 우수성을 확인하였다.

• 전자공학회논문지A
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• 제33A권5호
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• pp.212-221
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• 1996

A CMOS comparator is designed for low voltage and low power operations. The proposed comparator consists of a preadmplifier followed by a regenerative latch. The preasmplifier reduces the power consumption to a half with the power-down mode and the dynamic offsets of the latch, which is affected by each device mismatch, is statistically analyzed. The circuit is designed and simulated using a 0.8.mu.m n-well CMOS process and the dissipated power is 0.16mW at a 20MHz clock speed based on a 3V supply.

• 조명전기설비학회논문지
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• 제27권3호
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• pp.43-49
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• 2013

Recently harmonics flowing into power system is increasing as the usage of semiconductor equipments and switching mode power equipments are increasing. Harmonics cause problems such as heat increasing and reduction in capacity of transformers, especially the harmonics flowing into a distribution transformer can lead to the lifetime reduction of transformer. In this paper, we are about to develop a device that can monitor harmonics in real-time as it is affixed to a distribution transformer. Unlike the existing expensive harmonic analysis device, a new harmonic analysis algorithm is proposed in order to implement low-cost equipment. The real-time harmonic analysis algorithm proposed in this paper allows implementation on low performance microcontrollers, thus it can monitor the harmonic in real-time as it is individually affixed to the transformer. Therefore, it would improve the reliability of the transformer and stable power system operation would be possible as it can prevent the transformer accidents in advance.

• 한국컴퓨터정보학회논문지
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• 제23권11호
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• pp.67-74
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• 2018

The verification for the design limit margin of the power device for the information communication and surveillance systems using HALT(Highly Accelerated Life Test) reliability test is described. The HALT reliability test performs with a step stress method which change condition until the marginal step in a design and development phase. The HALT test methods are the low temperature(cold) step stress test, the high temperature(hot) step stress test, the thermal shock cyclic stess test, and the high temperature destruct limit(hot DL) step stress test. The power device is checked the operating performance during the test. In this paper, the HALT was performed to find out the design limit margin of the power device.

• 대한전기학회:학술대회논문집
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• 대한전기학회 1998년도 하계학술대회 논문집 D
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• pp.1324-1326
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• 1998

To drive motor or heating machine, it needs the electric power system like the apparatus of inverter. This electric power system obviously comprises power switching devices and drivers to run them. And this system has the topology comprised one/many arm(s), - each arm has high side switching device and low side switching device. Transformer, photocoupler, and HVIC having functions of isolation and level shift which are important thing to drive high side switching device are used as component of drivers in conventional apparatus. Piezoelectric transformers are proposed in this paper, and applied to drive high side swiching device. Through experiments, the possiblities of driving high side switching device are presented and the problems are mooted concurrently. But, we also consider a counterplan for solving the mooted trouble issues.

• 대한전기학회:학술대회논문집
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• 대한전기학회 1998년도 하계학술대회 논문집 G
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• pp.2458-2460
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• 1998

To drive motor or heating machine, it needs the electric power system like the apparatus of inverter. This electric power system obviously comprises power switching devices and drivers to run them. And this system has the topology comprised one/many arm(s), - each arm has high side switching device and low side switching device. Transformer, photocoupler, and HVIC having functions of isolation and level shift which are important thing to drive high side switching device are used as component of drivers in conventional apparatus. Piezoelectric transformers are proposed in this paper, and applied to drive high side swiching device. Through experiments, the possiblities of driving high side switching device are presented and the problems are mooted concurrently. But, we also consider a counterplan for solving the mooted trouble issues.

• JSTS:Journal of Semiconductor Technology and Science
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• 제16권2호
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• pp.159-165
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• 2016

Recently, active efforts are being made for future Si CMOS technology by various researches on emerging devices and materials. Capability of low power consumption becomes increasingly important criterion for advanced logic devices in extending the Si CMOS. In this work, a junctionless field-effect transistor (JLFET) with ultra-thin poly-Si (UTP) channel is designed aiming the sub-10-nm technology for low-power (LP) applications. A comparative study by device simulations has been performed for the devices with crystalline and polycrystalline Si channels, respectively, in order to demonstrate that the difference in their performances becomes smaller and eventually disappears as the 10-nm regime is reached. The UTP JLFET would be one of the strongest candidates for advanced logic technology, with various virtues of high-speed operation, low power consumption, and low-thermal-budget process integration.

• 전자통신동향분석
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• 제38권1호
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• pp.36-45
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• 2023

The increasing demand for ultra-high efficiency of compact power conversion systems for electric vehicle applications has brought GaN power semiconductors to the fore due to their low conduction losses and fast switching speed. In particular, the development of materials and core device processes contributed to remarkable results regarding the publication of vertical GaN power devices with high breakdown voltage. This paper reviews recent advances on GaN material technology and vertical GaN power device technology. The GaN material technology covers the latest technological trends and GaN epitaxial growth technology, while the vertical GaN power device technology examines diodes, Trench FETs, JFETs, and FinFETs and reviews the vertical GaN PiN diode technology developed by ETRI.

• 전력전자학회논문지
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• 제23권5호
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• pp.299-304
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• 2018

An ideal circuit breaker should supply electric power to loads without losses in a conduction state and completely isolate the load from the power source by providing insulation strength in a break state. Fault current is relatively easy to break in an Alternating Current (AC) circuit breaker because the AC current becomes zero at every half cycle. However, fault current in DC circuit breaker (DCCB) should be reduced by generating a high arc voltage at the breaker contact point. Large fire may occur if the DCCB does not take sufficient arc voltage and allows the continuous flow of the arc fault current with high temperature. A semiconductor circuit breaker with a power electronic device has many advantages. These advantages include quick breaking time, lack of arc generation, and lower noise than mechanical circuit breakers. However, a large load capacity cannot be applied because of large conduction loss. An extinguishing technology of DCCB with polymeric positive temperature coefficient (PPTC) device is proposed and evaluated through experiments in this study to take advantage of low conduction loss of mechanical circuit breaker and arcless breaking characteristic of semiconductor devices.