• Title/Summary/Keyword: leaky bucket

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Performance Analysis of REDP Marker with a combined Dropper for improving TCP Fairness of Assured Services

  • Kyeong Hur;Lee, Yeonwoo;Cho, Choon-Gen;Park, Hyung-Kun;Eom, Doo-Seop;Tchah, Kyun-Hyon
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.29 no.7B
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    • pp.711-721
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    • 2004
  • To provide the end-to-end service differentiation for assured services, the random early demotion and promotion (REDP) marker in the edge router at each domain boundary monitors the aggregate flow of the incoming in-profile packets and demotes in-profile packets or promotes the previously demoted in-profile packets at the aggregate flow level according to the negotiated interdomain service level agreement (SLA). The REDP marker achieves UDP fairness in demoting and promoting packets through random and early marking decisions on packets. But, TCP fairness of the REDP marker is not obvious as fur UDP sources. In this paper, to improve TCP fairness of the REDP marker, we combine a dropper with the REDP marker. To make packet transmission rates of TCP flows more fair, at the aggregate flow level the combined dropper drops incoming excessive in-profile packets randomly with a constant probability when the token level in the leaky bucket stays In demotion region without incoming demoted in-profile packets. It performs a dropping in the demotion at a domain boundary only if there is no prior demotion. The concatenate dropping at multiple domains is avoided to manifest the effect of a dropping at a domain boundary on TCP fairness. We experiment with the REDP marker with the combined dropper using ns2 simulator for TCP sources. The simulation results show that the REDP marker with the combined dropper improves TCP fairness in demoting and promoting packets by generating fair demoted in-profile traffic compared to the REDP marker. The effectiveness of the selected drop probability is also investigated with showing its impact on the performance of the REDP marker with the combined dropper.

Performance Analysis of ATM Switch Using Dynamic Priority Control Mechanisms (동적 우선순위 제어방식을 사용한 ATM 스위치의 성능분석)

  • 박원기
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.22 no.4
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    • pp.855-869
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    • 1997
  • In this paper, we proposed two kids of dynamic priority control mechanisms controlling the cell service ratio in order to improve the QOS(Quality of Service). We also analyse theoretically the characteristics of cell loss probability and mean cell delay time by applying the proposed priority control mechanisms to ATM switch with output buffer. The proposed priority control mechanisms have the same principles of storing cells into buffer but the different principles of serving cells from buffer. The one is the control mechanism controlling the cell service ratio according to the relative cell occupancy ratio of buffer, the other is the control mechanism controlling the cell service ratio according to both the relative cell occupancy ratio of buffer and the average arrival rate. The two service classes of our concern are the delay sensitive class and the loss sensitive class. The analytical results show that the proposed control mechanisms are able to improve the QOS, the characteristics of cell loss probability and mean cell delay time, by selecting properly the relative cell occupancy ratio of buffer and the average arrival rate. conventional DLB algorithm does not support synchronous cells, but the proposed algorithm gives higher priority to synchronous cells. To reduce synchronous cell loss rate, the synchronous cell detector is used in the proposed algorithm. Synchronous cell detector detects synchronous cells, and passes them cells to the 2nd Leaky-Bucket. So it is similar to give higher priority to synchronous cells. In this paper, the proposed algorithm used audio/video traffic modeled by On/Off and Two-state MMPP, and simulated by SLAM II package. As simulation results, the proposed algorithm gets lower synchronous cell loss rate than the conventional DLB algorithms. The improved DLB algorithm for multimedia synchronization can be extended to any other cells which require higher priority.

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Smoothing DRR: A fair scheduler and a regulator at the same time (Smoothing DRR: 스케줄링과 레귤레이션을 동시에 수행하는 서버)

  • Joung, Jinoo
    • The Journal of the Institute of Internet, Broadcasting and Communication
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    • v.19 no.1
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    • pp.63-68
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    • 2019
  • Emerging applications such as Smart factory, in-car network, wide area power network require strict bounds on the end-to-end network delays. Flow-based scheduler in traditional Integrated Services (IntServ) architecture could be possible solution, yet its complexity prohibits practical implementation. Sub-optimal class-based scheduler cannot provide guaranteed delay since the burst increases rapidly as nodes are passed by. Therefore a leaky-bucket type regulator placed next to the scheduler is being considered widely. This paper proposes a simple server that achieves both fair scheduling and traffic regulation at the same time. The performance of the proposed server is investigated, and it is shown that a few msec delay bound can be achieved even in large scale networks.