• Title/Summary/Keyword: leadframe

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Improvement of Adhesion Strength between Cu-based Leadframe and Fpoxy Molding Compound

  • Lee, Ho-Yoing
    • Transactions on Electrical and Electronic Materials
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    • v.1 no.3
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    • pp.23-28
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    • 2000
  • A block-oxide layer was formed on the surface of Cu-based leadframe by chamical oxidation method in order to enhance the adhesion strength between Cu-based leadframe and epoxy molding compound (EMC) Using sandwiched double cantilever beam (SDCB) specimens, the adesion strength was measured in terms of interfacial fracture toughness, G$\sub$IC//Results showed that the black-oxide layer was composed of two kinds of layers: pebble-like Cu$_2$O layer and acicular CuO layer, At the initial stage of oxidation the Cu$_2$O layer was preferentially formed and thickened up to around 200 nm whithin 1 minute of the oxidation time. Then the CuO layer started to from atop of the Cu$_2$O layer and thickened up to around 1300 nm until 20 minutes. As soon as the CuO layer formed, the thickness of Cu$_2$O layer began to reduce and finally reached to around 150 nm. The pre-cleaned and the Cu$_2$O coated leadframes showed almost no adhesion of EMC, however, as the CuO precipitates appeared and became continuous, G$\sub$IC/ increased up to around 80 J/㎡. Further oxidation raised G$\sub$IC/ up. to around 100 J/㎡.

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The Stress Analysis of Semiconductor Package (반도체 패키지의 응력 해석)

  • Lee, Jeong-Ick
    • Transactions of the Korean Society of Machine Tool Engineers
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    • v.17 no.3
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    • pp.14-19
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    • 2008
  • In the semiconductor IC(Integrated Circuit) package, the top surface of silicon chip is directly attached to the area of the leadframe with a double-sided adhesive layer, in which the base layer have the upper adhesive layer and the lower adhesive layer. The IC package structure has been known to encounter a thermo-mechanical failure mode such as delamination. This failure mode is due to the residual stress on the adhesive surface of silicon chip and leadframe in the curing-cooling process. The induced thermal stress in the curing process has an influence on the cooling residual stress on the silicon chip and leadframe. In this paper, for the minimization of the chip surface damage, the adhesive topologies on the silicon chip are studied through the finite element analysis(FEA).

Analysis of Residual Stresses Induced during Adhesion Process of Chip and Leadframe (칩과 리드페임의 접착과정에서 발생하는 잔류 응력 해석)

  • 이상순
    • Journal of the Computational Structural Engineering Institute of Korea
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    • v.13 no.1
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    • pp.97-103
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    • 2000
  • This paper deals with residual stresses induced at the viscoelastic adhesive layer between the semiconductor chip and the leadframe during adhesion process. The adhesive layer has been assumed to be“thermorheologically simple”. The time-domain boundary element method(BEM) has been employed to investigate the behavior of interface stresses. Numerical results show that very large stress gradients are present at the interface corner and such singularity might lead to local yielding or edge delamination.

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Irregular Failures at Metal/polymer Interfaces

  • Lee, Ho-Young
    • Journal of the Korean institute of surface engineering
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    • v.36 no.4
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    • pp.347-355
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    • 2003
  • Roughening of metal surfaces frequently enhances the adhesion strength of metals to polymers by mechanical interlocking. When a failure occurs at a roughened metal/polymer interface, the failure prone to be cohesive. In a previous work, an adhesion study on a roughened metal (oxidized copper-based leadframe)/polymer (Epoxy Molding Compound, EMC) interface was carried out, and the correlation between adhesion strength and failure path was investigated. In the present work, an attempt to interpret the failure path was made under the assumption that microvoids are formed in the EMC as well as near the roots of the CuO needles during compression-molding process. A simple adhesion model developed from the theory of fiber reinforcement of composite materials was introduced to explain the adhesion behavior of the oxidized copper-based leadframe/EMC interface and failure path. It is believed that this adhesion model can be used to explain the adhesion behavior of other similarly roughened metal/polymer interfaces.

A Fracture Mechanics Approach on Delamination and Package Crack in Electronic Packaging(ll) - Package Crack - (반도체패키지에서의 층간박리 및 패키지균열에 대한 파괴역학적 연구 (2) - 패키지균열-)

  • 박상선;반용운;엄윤용
    • Transactions of the Korean Society of Mechanical Engineers
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    • v.18 no.8
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    • pp.2158-2166
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    • 1994
  • In order to understand the package crack emanating from the edge of leadframe after the delamination between leadframe and epoxy molding compound in an electronic packaging of surface mounting type, the M-integral and J-integral in fracture mechanics are obtained. The effects of geometry, material properties and molding process temperature on the package crack are investigated taking into account the temperature dependence of the material properties, which simulates a more realistic condition. If the temperature dependence of the material properties is considered the result of analysis conforms with observations that the crack is kinked at between 50 and 65 degree. However, in case of constant material properties at the room temperature it is found that the J-integral is underestimated and the kink crack angle is different form the observation. The effects of the material properties and molding process temperature on J-integral and crack angle are less significant that the chip size for the cases considered here. It is suggested that the geometric factors such as ship size, leadframe size are to be well designed in order to prevent(or control) the occurrence and propagation of the package crack.

Structure and Growth of Tin Whisker on Leadframe with Lead-free Solder Finish (무연솔더 도금된 리드프레임에서 Sn 위스커의 성장과 구조)

  • Kim Kyung-Seob;Leem Young-Min;Yu Chong-Hee
    • Journal of the Microelectronics and Packaging Society
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    • v.11 no.3 s.32
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    • pp.1-7
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    • 2004
  • Tin plating on component finishes may grow whiskers under certain conditions, which may cause failures in electronics equipment. To protect the environment, 'lead-free' among component finishes is being promoted worldwide. This paper presents the evaluation results of whiskers on two kinds of lead-free plating materials at the plating temperature and under the reliability test. The rising plating temperature caused increasing the size of plating grain and shorting the growth of whisker. The whisker was grown under the temperature cycling the bent type in matt Sn plating and striated type in malt Sn-Bi. The whisker growth in Sn-Bi plating was shorter than that in Sn plating. In FeNi42 leadframe, the $7.0{\~}10.0{\mu}m$ diameter and the $25.0{\~}45.0{\mu}m$ long whisker was grown under 300 cycles. In the 300 cycles of Cu leadframe, only the nodule(nuclear state) grew on the surface, and in the 600 cycles, a $3.0{\~}4.0{\mu}m$ short whisker grew. After 600 cycles, the ${\~}0.34{\mu}m$ thin $Ni_3Sn_4$ formed on the Sn-plated FeNi42. However, we observed the amount of $0.76{\~}1.14{\mu}m$ thick $Cu_6Sn_5$ and ${\~}0.27{\mu}m$ thin $Cu_3Sn$ intermetallics were observed between the Sn and Cu interfaces. Therefore, the main growth factor of a whisker is the intermetallic compound in the Cu leadframe, and the coefficient of thermal expansion mismatch in FeNi42.

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