• The Transactions of the Korea Information Processing Society
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• v.3 no.3
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• pp.640-654
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• 1996

This paper presents a synthesis method for multi-level Reed-Muller circuits using BDDs(Binary Decision Diagrams). The existing synthesis tool for Reed circuits, FACTOR, is not appropriate to the synthesis of large circuits because it uses matrix (map-type) to represent given logic functions, resulting in the exponential time and space in number of imput to the circuits. For solving this problems, a syntheisis method based on BDD is presented. Using BDDs, logic functions are represented compactly. Therefor storage spaces and computing time for synthesizing logic functions were greatly decreased, and this technique can be easily applied to large circuits. Using BDD representations, the proposed method extract best patterns to minimize multi-level Reed Muller circuits with good performance in area optimization and testability. Experimental results using the proposed method show better performance than those using previous methods〔2〕. For large circuits of considering the best input partition, synthesis results have been improved.

• Journal of the Korean Institute of Telematics and Electronics A
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• v.32A no.10
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• pp.73-80
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• 1995

In this paper, a synthesis tool using matrix operations for designing multi-level Reed Muller circuits is described which has been named as MRM (Multi-level Reed Muller Minimizer). The synthesis method which uses matrix operations has advantages in effectively minimizing chip area, delay optimization and fault detection capability. However, it uses only truth-table type maps for inputs, synthesizing only small circuits. To overcome the weakness, our method accepts two-level description of a logic function. Since the number of cubes in the two-level description is small, the input matrix becomes small and large circuits can be synthesized. To convert two-level representations into multi-level ones, different input patterns are extracted to make a map which can be fed to the matrix operation procedure. Experimental results show better performance than previous methods. The matrix operation method presented in this paper is new to the society of Reed Muller circuits synthesis and provides solid mathematical foundations.

• Proceedings of the International Microelectronics And Packaging Society Conference
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• 2001.04a
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• pp.49-56
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• 2001

• The Journal of the Korea institute of electronic communication sciences
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• v.9 no.2
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• pp.167-171
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• 2014

Using chemical vapor deposition(CVD), the synthesis of graphene was performed on poly and single crystalline Cu substrates. The growth behavior of graphene and its characterization were shown utilizing the optical microscopic image and its image analysis. As a result in the analysis of graphene growth, it was found out the graphene is growing always in particular direction in relation to the crystalline direction of a single grain in polycrystalline Cu substrate. With the image analysis it was possible to show the characterization of graphene, such as the growth direction and the number of layers showing single, double and triple layers, within the neighboring single grains in polycrystalline Cu. In addition, the relatively large area of graphene with about $3mm^2$ on Cu(111) having high quality, single layer, and single crystalline was shown along with its characterization.

• Journal of the Korean Crystal Growth and Crystal Technology
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• v.31 no.2
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• pp.78-83
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• 2021

In this study, we prepared NiCo2O4 nanoparticles with large surface area by hydrothermal synthesis. In order to optimize the processing conditions for spinel NiCo2O4 nanoparticles with large surface area, experimental variables including concentration of Ni and Co precursor, reaction time, and temperature for post-heat treatment were evaluated. Optimized conditions for spinel NiCo2O4 with large surface area were [Ni]/[Co] 1:2 ratio, reaction time for 12 h, and post-heat treatment at 400℃. To investigate the feasibility as potential application for glucose sensor, electrochemical tests of the prepared NiCo2O4 nanoparticles in response to glucose was performed, which suggests that the NiCo2O4 can be suitable for a non-enzymatic-based electrochemical glucose sensor based on its high sensitivity and selectivity for glucose detection.

• Journal of Environmental Science International
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• v.28 no.1
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• pp.99-106
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• 2019

Arsenic is among the heavy metals commonly found in aqueous environments. Iron oxide is known as an efficient adsorbent for the arsenic. A new synthetic method was applied to provide iron oxide giving a large specific surface area. The mixing method affects the formation of iron oxide. Ultrasonic waves assisted the formation of very fine iron oxide in an organic phase. The synthesized iron oxide is amorphous type with a high surface area of more than $181.3m^2/g$. Sorption capacity of the synthesized adsorbent was relatively very high for arsenic and varied depending on the oxidation state of arsenic: a higher capacity was obtained with As(V). Lower solution pH provided a higher sorption capacity for As(V). The competitive effect of co-exist anions such as chloride, nitrate, and sulfate was minimal in sorption capacity of the iron oxide for arsenic.

• Bulletin of the Korean Chemical Society
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• v.25 no.9
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• pp.1341-1345
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• 2004

We developed a novel synthesis strategy of titania nanowire arrays by employing simple hydrothermal reaction and ion-exchange reaction techniques. Hydrothermal reactions of metallic titanium powder with $H_2O_2$ in a 10 M NaOH solution produced a new sodium titanate compound, $Na_2Ti_6O_{13}{\cdot}xH_2O$ (x~4.2), as arrays of nanowires of lengths up to 1 mm. Acid-treatment followed by calcination of this material produced arrays of highly crystalline anatase nanowires as evidenced by x-ray diffraction, Raman spectroscopy, and transmission electron microscopy studies. In both cases of sodium titanate and anatase, the nanowires have exceptionally large aspect ratios of 10,000 or higher, and they form arrays over a large area of $1.5 {\times} 3 cm^2$. Observations on the reaction products with varied conditions indicate that the array formation requires simultaneously controlled formation and crystal growth rates of the $Na_2Ti_6O_{13}{\cdot}xH_2O$ phase.

• Carbon letters
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• v.13 no.4
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• pp.205-211
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• 2012

Methanol as a carbon source in chemical vapor deposition (CVD) graphene has an advantage over methane and hydrogen in that we can avoid optimizing an etching reagent condition. Since methanol itself can easily decompose into hydrocarbon and water (an etching reagent) at high temperatures [1], the pressure and the temperature of methanol are the only parameters we have to handle. In this study, synthetic conditions for highly crystalline and large area graphene have been optimized by adjusting pressure and temperature; the effect of each parameter was analyzed systematically by Raman, scanning electron microscope, transmission electron microscope, atomic force microscope, four-point-probe measurement, and UV-Vis. Defect density of graphene, represented by D/G ratio in Raman, decreased with increasing temperature and decreasing pressure; it negatively affected electrical conductivity. From our process and various analyses, methanol CVD growth for graphene has been found to be a safe, cheap, easy, and simple method to produce high quality, large area, and continuous graphene films.

• Proceedings of the Korean Vacuum Society Conference
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• 2012.08a
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• pp.107-107
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• 2012

Recently, large-area synthesis of high-quality but polycrystalline graphene has been advanced as a scalable route to applications including electronic devices. The presence of grain boundaries (GBs) may be detrimental on some electronic, thermal, and mechanical properties of graphene, including reduced electronic mobility, lower thermal conductivity, and reduced ultimate mechanical strength, yet on the other hand, GBs might be beneficially exploited via controlled GB engineering. The study of graphene grains and their boundary is therefore critical for a complete understanding of this interesting material and for enabling diverse applications. I present that scanning electron diffraction in STEM mode makes possible fast and direct identification of GBs. We also demonstrate that dark field TEM imaging techniques allow facile GB imaging for high-angle tilt GBs in graphene. GB mapping is systematically carried out on large-area graphene samples via these complementary techniques. The study of the detailed atomic structure at a GB in suspended graphene uses aberration-corrected atomic resolution TEM at a low kV.

• 한국신재생에너지학회:학술대회논문집
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• 2010.06a
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• pp.60.2-60.2
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• 2010

본 연구는 상온 상압하에서 미세구조 패턴을 갖는 대용량의 CaCO3 박막을 제조하고 여러 가지 첨가제를 이용하여 박막 표면의 형상제어를 수행하였다. 또한 형상 제어된 CaCO3 박막을 템플릿으로 이용하여 고분자 및 금속 박막 형상 제어 연구를 수행하였다. 본 연구를 통해 개발된 LACS(Large Area CaCO3 Stamping)법을 통해 흡착능과 소수성의 특성과 같은 다양한 기능성을 갖는 박막의 제조가 가능하였다. 기존의 박막제조 기술은 주로 저압조건에서 이루어지기 때문에 대면적화가 어렵고 형상을 제어 하는데 여러 가지 단점이 있었던 반면 LACS는 에너지의 소모가 적고 다양한 형상제어를 통해 기존의 박막제조 기술의 단점을 보완할 수 있을 것으로 판단된다.