• Journal of Broadcast Engineering
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• v.7 no.3
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• pp.248-261
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• 2002

In this paper, we proposed a new 3-dimensional(3-D) object-tracking algorithm that can control a stereo camera using a variable window mask supported by which uses ,B-D information and an optical BPEJTC. Hence, three-dimensional information characteristics of a stereo vision system, distance information from the stereo camera to the tracking object. can be easily acquired through the elements of a stereo vision system. and with this information, we can extract an area of the tracking object by varying window masks. This extractive area of the tracking object is used as the next updated reference image. furthermore, by carrying out an optical BPEJTC between a reference image and a stereo input image the coordinates of the tracking objects location can be acquired, and with this value a 3-D object tracking can be accomplished through manipulation of the convergence angie and a pan/tilt of a stereo camera. From the experimental results, the proposed algorithm was found to be able to the execute 3-D object tracking by extracting the area of the target object from an input image that is independent of the background noise in the stereo input image. Moreover a possible implementation of a 3-D tele-working or an adaptive 3-D object tracker, using the proposed algorithm is suggested.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.28 no.1C
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• pp.24-31
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• 2003

In this paper, a new opto-digital multiple information hiding and real-time extracting system is implemented. That is, multiple information is hidden in a cover image by using the stego keys which are generated by combined use of random sequence(RS) and Hadamard matrix(HM) and these hidden information is extracted in real-time by using a new optical correlator-based extraction system. In the experiment, 3 kinds of information, English alphabet of "N", "R", "L" having 512$\times$512 pixels, are formulated 8$\times$8 blocks and each of these information is multiplied with the corresponding stego keys having 64$\times$64 pixels one by one. And then, by adding these modulated data to a cover image of "Lena"having 512$\times$512 pixels, a stego image is finally generated. In this paper, as an extraction system, a new optical nonlinear joint transform correlator(NJTC) is introduced to extract the hidden data from a stego image in real-time, in which optical correlation between the stego image and each of the stego keys is performed and from these correlation outputs the hidden data can be asily exacted in real-time. Especially, it is found that the SNRs of the correlation outputs in the proposed optical NJTC-based extraction system has been improved to 7㏈ on average by comparison with those of the conventional JTC system under the condition of having a nonlinear parameter less than k=0.4. This good experimental results might suggest a possibility of implementation of an opto-digital multiple information hiding and real-time extracting system.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.17 no.4
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• pp.26-35
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• 2003

For the recognizing system to be classified the same or different images in the nature the rotation, scale and transition invariant features is to be necessary. There are many investigations to get the feature for the recognition system and the log-polar transform which is to be get the invariant feature for the scale and rotation is used. In this paper, we suggested the character recognition methods which are used the centroid method and the log-polar transform with the interpolation to get invariant features for the character recognition system and obtained the results of the above 50% differential ratio for the character features. And we obtained the about 90% recognition ratio from the suggested character recognition system using the BPEJTC which is used the invariant feature from the Mellin transform method for the reference image. and can be recognized the scaled and rotated input character. Therefore, we suggested the image character recognition system using the Mellin transform method and the BPEJTC is possible to recognize with the invariant feature for rotation scale and transition.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.27 no.4B
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• pp.353-364
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• 2002

In this paper, a new onto-digital stereo object-tracking system using hierarchical digital algorithms and optical BPEJTC is proposed. This proposed system can adaptively track a moving target by controlling the convergence of stereo camera. firstly, the target is detected through the background matching of the sequential input images by using optical BPEJTC and then the target area is segmented by using the target projection mask which is composed by hierarchical digital processing of image subtraction, logical operation and morphological filtering. Secondly, the location's coordinate of the moving target object for each of the sequential input frames can be extracted through carrying out optical BPEJTC between the reference image of the target region mask and the stereo input image. Finally, the convergence and pan/tilt of stereo camera can be sequentially controlled by using these target coordinate values and the target can be kept in tracking. Also, a possibility of real-time implementation of the adaptive stereo object tracking system is suggested through optically implementing the proposed target extraction and convergence control algorithms.

• Publications of The Korean Astronomical Society
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• v.24 no.1
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• pp.65-81
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• 2009

We present the performance test results of VLBI Correlation Subsystem (VCS) trial product which was being developed for 1 year from August 2007. It is a core component of Korea-Japan Joint VLBI Correlator (KJJVC). The aim for developing VCS trial product is to improve the performance of VCS main product to reduce the efforts and cost, and to solve the design problems by performing the preliminary test of the manufactured trial product. The function of VCS trial product is that it is able to process the 2 stations-1 baseline, 8 Gbps/station speed, 1.2 Gbps output speed with FX-type. VCS trial product consists of Read Data Control Board (RDC), Fourier Transform Board (FTB), and Correlation and Accumulation Board (CAB). Almost main functions are integrated in the FTB and CAB board. In order to confirm the performance of VCS trial product functions, the spectral analysis, delay compensation and correlation processing experiments were carried out by using simulation and real observation data. We found that the overflow problem of re-quantization after FFT processing was occurred in the delay compensation experiment. We confirmed that this problem was caused by valid bit-expression of the re-quantized data. To solve this problem, the novel method will be applied to VCS main product. The effectiveness of VCS trial product has been verified through the preliminary experimental results, but the overflow problem was occurred.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.27 no.12C
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• pp.1288-1298
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• 2002

To implement elliptic curve cryptosystem in GF(2$\^$m/) at high speed, a fast divider is required. Although bit-parallel architecture is well suited for high speed division operations, elliptic curve cryptosystem requires large m(at least 163) to support a sufficient security. In other words, since the bit-parallel architecture has an area complexity of 0(m$\^$m/), it is not suited for this application. In this paper, we propose a new serial-in serial-out systolic array for computing division operations in GF(2$\^$m/) using the standard basis representation. Based on a modified version of tile binary extended greatest common divisor algorithm, we obtain a new data dependence graph and design an efficient bit-serial systolic divider. The proposed divider has 0(m) time complexity and 0(m) area complexity. If input data come in continuously, the proposed divider can produce division results at a rate of one per m clock cycles, after an initial delay of 5m-2 cycles. Analysis shows that the proposed divider provides a significant reduction in both chip area and computational delay time compared to previously proposed systolic dividers with the same I/O format. Since the proposed divider can perform division operations at high speed with the reduced chip area, it is well suited for division circuit of elliptic curve cryptosystem. Furthermore, since the proposed architecture does not restrict the choice of irreducible polynomial, and has a unidirectional data flow and regularity, it provides a high flexibility and scalability with respect to the field size m.