• Journal of Power Electronics
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• v.10 no.4
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• pp.428-433
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• 2010

This paper proposes a harmonics reduction technique for the input currents of three phase PWM converters. The quality of the phase angle information on the utility voltage connected to the PWM converters affects their control performance. Under a distorted utility voltage, the extracted phase angle based on the synchronous reference frame PLL method is distorted. This causes large harmonics in the input currents of a PWM converter. In this paper, a harmonics reduction method that makes the input currents in the PWM converter sinusoidal even under distorted utility conditions is proposed. By the proposed method, without additional hardware, the THD (Total Harmonic Distortion) of the input currents can be readily limited to below 5% which is the harmonic current requirements of IEEE std. 519. Its validity is verified by simulations and experimental results.

• ETRI Journal
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• v.34 no.3
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• pp.470-473
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• 2012

In this letter, the constant driving power reduction ratio has been achieved for column drivers regardless of the input image by incorporating a new static power reduction scheme into the previous dynamic power reduction method. The measured power reduction ratio is around 50% for a 120 Hz liquid crystal display panel in such cases of still input video and fallback.

• Smart Structures and Systems
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• v.13 no.1
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• pp.99-109
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• 2014

The goal of any Model Order Reduction (MOR) technique is to build a model of order lower than the one of the real model, so that the computational effort is reduced, and the ability to estimate the input-output mapping of the original system is preserved in an important region of the input space. Actually, since only a subset of the input space is of interest, the matching is required only in this subset of the input space. In this contribution, the consequences on the achieved accuracy of adopting different reduction technique patterns is discussed mainly with reference to a linear case study.

• Proceedings of the Korean Society of Precision Engineering Conference
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• 1997.04a
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• pp.30-34
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• 1997

This paper Describe a modelling method for SCR(selective Catalytic reduction) system in refuse incineration plant. We consider the SCR system as a single input single output system. For modelling the SCR system, an auto regressive exogeneous(ARX) modelling method is used. In this case, we should design the white noise input for modelling and put it on the system as an input (.NH/sap2/.), and taken an outlet NOx as an output. From these two relations, we design the ARX model with 45 second delay time and transform to discrete system with 0.5 sampling time. Using the obtained SCR model, we simulate the SCR system to reduce the outlet NOx content by a conventional PID control method.

• Journal of the Semiconductor & Display Technology
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• v.11 no.2
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• pp.33-38
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• 2012

The wafer positioning robot in the semiconductor industry is required to operate at high speed for the improvement of productivity. The residual vibration caused by the high speed of the wafer positioning robot, however, makes the life of the robot shorter and the cycle time longer. In this study, the input shaping and the path of the system are designed for the reduction of the residual vibration and the improvement of the cycle time. The followings are the process for the reduction and the improvement; 1) System modeling of the wafer positioning robot, 2) Verification of dynamic characteristics of the wafer positioning robot, 3) Input shaping plan using impulse response reiteration, 4) Simulation test using SIMULINK program, 5) Analysis of result.

• Journal of the Korean Society for Precision Engineering
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• v.17 no.4
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• pp.181-188
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• 2000

Input shaping is a method fur reducing residual vibration. Vibration is eliminated by convolving an input shaper, which is a sequence of impulses, with the desired system command. It has been applied to robot with a flexible manipulator. But it can be applied to the reduction of residual vibration far overhead crane. In this paper, input shaping shows good performance for anti-sway of overhead crane. In the z-domain, we designed an input shaper and calculated the sensitivity of it. If sensitivity is calculated in the z-domain, the shapes of sensitivity curves are expected easily. Accordingly, it is easy to design an input shaper in the z-domain. We compared the response of a system with shaper to it without that. Also, we compared El shaper to ZV shaper in view of robustness.

• Journal of Electrical Engineering and Technology
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• v.10 no.6
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• pp.2307-2314
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• 2015

In this paper, a discontinuous conduction mode (DCM) frequency control algorithm is proposed to reduce the input current ripple of a multi-phase interleaved boost converter. Unlike conventional variable duty and constant frequency control, the proposed algorithm controls the switching frequency to regulate the output voltage. By fixing the duty ratio at 1/N in the N-phase interleaved boost converter, the input current ripple can be minimized by ripple cancellation. Furthermore, the negative effects of the diode reverse recovery current are eliminated because of the DCM characteristic. A frequency controller is designed to employ the proposed algorithm considering the magnetic permeability change. The proposed algorithm is analyzed in the frequency domain and verified by a 600 W three-phase boost converter prototype that achieved 57% ripple current reduction.

• Phonetics and Speech Sciences
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• v.7 no.4
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• pp.3-8
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• 2015

In this paper, we investigate an input dimension reduction method using continuous word vector in deep neural network language model. In the proposed method, continuous word vectors were generated by using Google's Word2Vec from a large training corpus to satisfy distributional hypothesis. 1-of-${\left|V\right|}$ coding discrete word vectors were replaced with their corresponding continuous word vectors. In our implementation, the input dimension was successfully reduced from 20,000 to 600 when a tri-gram language model is used with a vocabulary of 20,000 words. The total amount of time in training was reduced from 30 days to 14 days for Wall Street Journal training corpus (corpus length: 37M words).

• Proceedings of the IEEK Conference
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• 2002.06b
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• pp.101-104
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• 2002

This paper propose that is algorithm of power dissipation reduction in the high level synthesis design for DSP(Digital Signal Processor), as the portable terminal system recently demand high power dissipation. This paper obtain effect of power dissipation reduction and switching activity that increase correlation of operands as input data of function unit. The algorithm search loop or repeatedly data to the input operands of function unit. That can be reduce the power dissipation using the new low power high level synthesis algorithm. In this Paper, scheduling operation search same nodes from input DFG(Data Flow Graph) with correlation coefficient of first input node and among nodes. Function units consist a multiplier, an adder and a register. The power estimation method is added switching activity for each bits of nodes. The power estimation have good efficient using proposed algorithm. This paper result obtain more Power reduction of fifty percents after using a new low power algorithm in a function unit as multiplier.

• Proceedings of the Korean Society for Noise and Vibration Engineering Conference
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• 2005.11a
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• pp.559-563
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• 2005

The wafer positioning robot used in the semiconductor industry is required to operate at high speed for the improvement of productivity. However, the residual vibration produced by the high speed of the wafer positioning robot makes the life of the robot shorter and the cycle time longer. In this study, the input shaping and the path of the system are designed for the reduction of the residual vibration and the optimization of the cycle time. The followings are the process for the reduction and the optimization; 1)System modeling of wafer positioning robot, 2)Verification of dynamic characteristic of wafer positioning robot, 3)Input shaping plan using impulse response reiteration, 4)Simulation test using simulink, 6)Analysis of result.