• Title/Summary/Keyword: hot electron degradation

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Investigations on electron beam weldability of AlZnMgCu0.5 alloys (AlZnMgCu0.5 합금의 Electron Beam 용접성에 관한 연구)

  • 배석천
    • Journal of Welding and Joining
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    • v.15 no.4
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    • pp.166-177
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    • 1997
  • The high strength AlZnMgCu0.5 alloy is a light metal with good age hardenability, and has a high tensile and yielding strength. Therefore, it can be used for structures requiring high speciple strength. Even though high strength AlZnMgCu alloy has good mechanical properties, it has a lot of problems in TIG and MIG welding processes. Since lots of high heat absorption is introduced into the weldment during TIG and MIG processes, the microstructural variation and hot cracks take place in heat affected zone. Therefore, the mechanical properties of high strength AlZnMgCu0.5 alloy can be degraded in weldment and heat affected zone. Welding process utilizing high density heat source such as electron beam should be developed to reduce pore and hot cracking, whichare usually accompanied by MIG and TIG welding processes. In this work, electron beam welding process were used with or without AlMg4.5Mn as filler material to avoid the degradation of mechanical properties. Mechanical and metallurgical characteristics were also studied in electron beam weldment and heat affected zone. Moreover hot cracking mechanism was also investigated.

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PMOSFET degradation due to bidirectional hot carrier stress (양 방향 Hot Carrier 스트레스에 의한 PMOSFET 노쇠화)

  • 김용택;김덕기;유종근;박종태;박병국;이종덕
    • Journal of the Korean Institute of Telematics and Electronics A
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    • v.32A no.6
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    • pp.59-66
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    • 1995
  • The hot electron induced effective channel length modulation (${\Delta}L_{H}$) and HEIP characteristics in PMOSFET's after bidirectional stress are presented. Trapped electron charges in gate oxide and lateral field are calculated from the gate current model, and ${\Delta}L_{H}$(${\Delta}L_{HD},\;{\Delta}L_{HS}$) is calculated using trapped electron charges and lateral field. It has been found that ${\Delta}I_{d}$and ${\Delta}L_{H}$ are more affected by the stress order (Forward-Reverse of Reverse or Reverse-Forward) than the stress direction, and they vary logarithmically with the stress time. In contrast, ${\Delta}V_{t}$ and ${\Delta}V_{pt}$ are more affected by the stress direction thatn the stress order. The correlation between ${\Delta}V_{pt}$ and the stress time can be explanined as the following polynomial functin: ${\Delta}V_{pt}$=AT$^{n}$. It has also been shown that PMOSFET degradation is related with the gate current and the effects of ${\Delta}V_{pt}$ is the most significant.

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Analysis and Degradation of leakage Current in submicron Device (미세소자에서 누설전류의 분석과 열화)

  • 배지철;이용재
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 1996.11a
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    • pp.113-116
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    • 1996
  • The drain current of the MOSFET in the off state(i.e., Id when Vgs=0V) is undesired but nevertheless important leakage current device parameter in many digital CMOS IC applications (including DRAMs, SRAMs, dynamic logic circuits, and portable systems). The standby power consumed by devices in the off state have added to the total power consumed by the IC, increasing heat dissipation problems in the chip. In this paper, hot-carrier-induced degra- dation and gate-induced-drain-leakage curr- ent under worse case in P-MOSFET\`s have been studied. First of all, the degradation of gate-induced- drain-leakage current due to electron/hole trapping and surface electric field in off state MOSFET\`s which has appeared as an additional constraint in scaling down p-MOSFET\`s. The GIDL current in p-MOSFET\`s was decreased by hot-electron stressing, because the trapped charge were decreased surface-electric-field. But the GIDL current in n-MOS77T\`s under worse case was increased.

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Effects of Device Layout On The Performances of N-channel MuGFET (소자 레이아웃이 n-채널 MuGFET의 특성에 미치는 영향)

  • Lee, Sung-Min;Kim, Jin-Young;Yu, Chong-Gun;Park, Jong-Tae
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.49 no.1
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    • pp.8-14
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    • 2012
  • The device performances of n-channel MuGFET with different fin numbers and fin widths but the total effective channel width is constant have been characterized. Two kinds of Pi-gate devices with fin number=16, fin width=55nm, and fin number=14, fin width=80nm have been used in characterization. The threshold voltage, effective electron mobility, threshold voltage roll-off, inverse subthreshold slope, PBTI, hot carrier degradation, and drain breakdown voltage have been characterized. From the measured results, the short channel effects have been reduced for narrow fin width and large fin numbers. PBTI degradation was more significant in devices with large fin number and narrow fin width but hot carrier degradation was similar for both devices. The drain breakdown voltage was higher for devices with narrow fin width and large fin numbers. With considering the short channel effects and device degradation, the devices with narrow fin width and large fin numbers are desirable in the device layout of MuGFETs.

Hot-Carrier Degradation of NMOSFET (NMOSFET의 Hot-Carrier 열화현상)

  • Baek, Jong-Mu;Kim, Young-Choon;Cho, Moon-Taek
    • Journal of the Korea Academia-Industrial cooperation Society
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    • v.10 no.12
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    • pp.3626-3631
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    • 2009
  • This study has provided some of the first experimental results of NMOSFET hot-carrier degradation for the analog circuit application. After hot-carrier stress under the whole range of gate voltage, the degradation of NMOSFET characteristics is measured in saturation region. In addition to interface states, the evidences of hole and electron traps are found near drain depending on the biased gate voltage, which is believed to the cause for the variation of the transconductance($g_m$) and the output conductance($g_{ds}$). And it is found that hole trap is a dominant mechanism of device degradation in a low-gate voltage saturation region, The parameter degradation is sensitive to the channel length of devices. As the channel length is shortened, the influence of hole trap on the channel conductance is increased. Because the magnitude of $g_m$ and $g_{ds}$ are increased or decreased depending on analog operation conditions and analog device structures, careful transistor design including the level of the biased gate voltage and the channel length is therefore required for optimal voltage gain ($A_V=g_m/g_{ds}$) in analog circuit.

Research for Hot Carrier Degradation in N-Type Bulk FinFETs

  • Park, Jinsu;Showdhury, Sanchari;Yoon, Geonju;Kim, Jaemin;Kwon, Keewon;Bae, Sangwoo;Kim, Jinseok;Yi, Junsin
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.33 no.3
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    • pp.169-172
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    • 2020
  • In this paper, the effect of hot carrier injection on an n-bulk fin field-effect transistor (FinFET) is analyzed. The hot carrier injection method is applied to determine the performance change after injection in two ways, channel hot electron (CHE) and drain avalanche hot carrier (DAHC), which have the greatest effect at room temperature. The optimum condition for CHE injection is VG=VD, and the optimal condition for DAHC injection can be indirectly confirmed by measuring the peak value of the substrate current. Deterioration by DAHC injection affects not only hot electrons formed by impact ionization, but also hot holes, which has a greater impact on reliability than CHE. Further, we test the amount of drain voltage that can be withstood, and extracted the lifetime of the device. Under CHE injection conditions, the drain voltage was able to maintain a lifetime of more than 10 years at a maximum of 1.25 V, while DAHC was able to achieve a lifetime exceeding 10 years at a 1.05-V drain voltage, which is 0.2 V lower than that of CHE injection conditions.

Preparation of C60 Nanowhiskers/WO3 Nanocomposites and Photocatalytic Degradation of Organic Dyes

  • Kim, Keun Hyung;Ko, Jeong Won;Ko, Weon Bae
    • Elastomers and Composites
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    • v.50 no.2
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    • pp.126-131
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    • 2015
  • $C_{60}$ nanowhiskers were synthesized from $C_{60}$ by liquid-liquid interfacial precipitation (LLIP) using $C_{60}$-saturated toluene and isopropyl alcohol. The $WO_3$ nanoparticles were synthesized by adding $3.8{\times}10^{-4}$ mole amount of ammonium metatungstate hydrate ($H_{26}N_6O_{40}W_{12}{\cdot}H_2O$) to 500 ml of distilled water, and the resulting solution was heated on a hot plate for 4 h. The $C_{60}$ nanowhiskers/$WO_3$ nanocomposites were prepared with $C_{60}$ nanowhiskers and $WO_3$ nanoparticles in an electric furnace at $700^{\circ}C$ in an argon gas atmosphere for 2 h. The $C_{60}$ nanowhiskers/$WO_3$ nanocomposites were characterized by X-ray diffraction, scanning electron microscopy, and transmission electron microscopy. UV-vis spectroscopy was used to evaluate the performance of the $C_{60}$ nanowhiskers/$WO_3$ nanocomposites as a photocatalyst in the degradation of organic dyes, such as methylene blue (MB) and brilliant green (BG) under ultraviolet light (254 nm).

A Study on the Hot Carrier Effect Improvement by HLDBD (High-temperature Low pressure Dielectric Buffered Deposition)

  • Lee, Yong-Hui;Kim, Hyeon-Ho;Woo, Kyong-Whan;Kim, Hyeon-Ki;Yi, Jae-Young;Yi, Cheon-Hee
    • Proceedings of the IEEK Conference
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    • 2002.07b
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    • pp.1042-1045
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    • 2002
  • The scaling of device dimension and supply voltage with high performance and reliability has been the main subject in the evolution of VLSI technology, The MOSFET structures become susceptible to high field related reliability problems such as hot-electron induced device degradation and dielectric breakdown. HLDBD(HLD Buffered Deposition) is used to decrease junction electric field in this paper. Also we compared the hot carrier characteristics of HLDBD and conventional.

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Lateral Electric Field Model and Degradation Mechanism of surface-Channel PMOSFET's (SC PMOSFET의 수평 전개 모델과 노쇠화 메카니즘)

  • 양광선;박종태;김봉렬
    • Journal of the Korean Institute of Telematics and Electronics A
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    • v.31A no.1
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    • pp.54-60
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    • 1994
  • In this paper, we present the analytical models for the change of the lateral electric field distribution and the velocity saturation region length with the electron trapping of stressed SC-PMOSFET in the saturation region. To derive the hot-electron-induced lateral electric field of stressed SC-PMOSFET. Ko's pseudo two dimensional box model in the saturation region which illustrates the analysis of the velocity saturation region is modified under the condition of electron trapping in the oxide near the drain region. From the results, we have the following lateral electric field in the y-direction, that is, E(y) ES1satT.cosh(y/l) qNS1tT.sinh(y/l)/lCox. It is shown that the trapped electrons influence the field in the drain region. decreasing the lateral electric field. Calculated velocity saturaion length increases with the trapped electrons. increasing the drain current of stressed SCPMOSFET. This results well explain the HEIP phenomenon of PMOSFET's.

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Hydrogen-Related Gate Oxide Degradation Investigated by High-Pressure Deuterium Annealing (고압 중수소 열처리 효과에 의해 조사된 수소 결합 관련 박막 게이트 산화막의 열화)

  • 이재성
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.41 no.11
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    • pp.7-13
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    • 2004
  • Experimental results are presented for the degradation of 3 nm-thick gate oxide under -2.5V $\leq$ V$_{g}$ $\leq$-4.0V stress and 10$0^{\circ}C$ conditions using P and NMOSFETs that are annealed with hydrogen or deuterium gas at high-pressure (5 atm). The degradation mechanisms are highly dependent on stress conditions. For low gate voltage, hole-trapping is found to dominate the reliability of gate oxide both in P and NMOSFETs. With increasing gate voltage to V$_{g}$ =-4.0V, the degradation becomes dominated by electron-trapping in NMOSFETs, however, the generation rate of "hot" hole was very low, because most of tunneling electrons experienced the phonon scattering before impact ionization at the Si interface. Statistical parameter variations as well as the gate leakage current depend on and are improved by high-pressure deuterium annealing, compared to corresponding hydrogen annealing. We therefore suggest that deuterium is effective in suppressing the generation of traps within the gate oxide. Our results therefore prove that hydrogen related processes are at the origin of the investigated oxide degradation.gradation.