• Journal of Positioning, Navigation, and Timing
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• v.13 no.2
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• pp.149-158
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• 2024

Global Navigation Satellite System (GNSS) receivers are becoming increasingly sophisticated, equipped with advanced features and precise specifications, thus demanding efficient and high-performance hardware platforms. This paper presents the design and implementation of a Field-Programmable Gate Array (FPGA)-based GNSS receiver development platform for multi-band signal processing. This platform utilizes a FPGA to provide a flexible and re-configurable hardware environment, enabling real-time signal processing, position determination, and handling of large-scale data. Integrated signal processing of L/S bands enhances the performance and functionality of GNSS receivers. Key components such as the RF frontend, signal processing modules, and power management are designed to ensure optimal signal reception and processing, supporting multiple GNSS. The developed hardware platform enables real-time signal processing and position determination, supporting multiple GNSS systems, thereby contributing to the advancement of GNSS development and research.

• Journal of Biomedical Engineering Research
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• v.22 no.3
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• pp.285-291
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• 2001

In this paper, we designed two preprocessing adaptive filter - high pass filter and notch filter - using FPGA. For minimizing the calculation load of multi-channel and high-resolution ECG system, we utilize FPGA rather than digital signal processing chip. To implement the designed filters in FPGA, we utilize FPGA design tool(Altera corporation, MAX-PLUS II) and CSE database as test data. In order to evaluate the performance in terms of processing time, we compared the designed filters with the digital filters implemented by ADSP21061(Analog Devices). As a result, the filters implemented by FPGA showed better performance than the filters based on ADSP21061. As a consequence of examination, we conclude that FPGA is a useful solution in multi-channel and high-resolution signal processing.

• IEMEK Journal of Embedded Systems and Applications
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• v.14 no.1
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• pp.33-41
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• 2019

We propose an embedded solution to design a high-speed and high-accuracy 16bit analog-digital signal processing interface for the control systems using various external analog signals. Choosing TMS320F28377D micro controller unit (MCU) featuring high-performance processing in the 32-bit floating point operation, low power consumption, and various I/O device supports, we design and build the proposed system that supports both 16-bit analog-digital converter (ADC) interface and high precision digital-analog converter (DAC) interface. The ADC receives voltage-level differential signals from fully differential amplifiers, and the DAC communicates with MCU through 50 MHz bandwidth high-fast serial peripheral interface (SPI). We port the boot loader and device drivers to the implemented board, and construct the firmware development environment for the application programming. The performance of the entire implemented system is demonstrated by analog-digital signal processing tests, and is verified by comparing the test results with those of existing similar systems.

• Journal of the Institute of Convergence Signal Processing
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• v.7 no.2
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• pp.65-72
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• 2006

In digital signal processing, the polyphase decomposition of signal has been often used in the implementation of multirate system. Especially, in the design of digital filter and so forth the method in very useful to improve the performance of various algorithms because it provides the multi-channel for paralled processing. Generally, the polyphase-decomposed signals tend to expand the frequency band by including more high frequencies than original signal from decimation for down sampling. This property brings about the significant limitation in the structure or the performance of digital polyphase signal processing system. In this paper we theoretically propose a perfect band compression and reconstruction method for polyphase component signals, then experimentally show its effectiveness through Matlab simulation.

• Journal of Sensor Science and Technology
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• v.19 no.3
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• pp.230-237
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• 2010

In sensor signal conditioning and processing, offset and drift characteristics of an operational amplifier are an important factor when the amplifier is used for a precise sensor signal amplifier. In order to use it in high accuracy, an expensive trimming or a complex compensation circuit is required. This paper presents the improved sensor signal conditioning and processing device for ubiquitous sensor network(USN) application or general purpose by developing a hardware of the circuit for reducing the offset voltage and drift characteristics, and a software for its control and sensor signal processing. We realize better offset voltage and drift characteristics of the signal conditioning circuit using low cost operational amplifiers. The experimental results show that this technique is effective in improving the performance of the sensor signal processing device.

• Proceedings of the Korea Institute of Convergence Signal Processing
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• 2000.08a
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• pp.257-260
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• 2000

In modern battlefield situation, radar and infrared sensors may be located on aircraft having limited computational resources available for real-time computer processing. Hence sensor images are transmitted typically to central stations for processing and automatic target recognition/detection. Owing to the limited bandwidth channels that are typically available between the aircraft and processing stations, images are compressed prior to transmission to facilitate rapid transfer. In this paper we examine the problem of compressing sensor data for transmission, given that target recognition is the end goal. Performance result shows that the front-end target recognition system achieves a relatively high level of performance as well as a high compression ratio.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2000.11a
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• pp.409-412
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• 2000

A high performance EEG signal measurement system is fabricated. It consists of high precision pre-amplifier and auto identification bandwidth unit. High precision pre-amplifier is composed of signal generator, signal amplifier with a impedance converter, body driver and isolation amplifier. The pre-amplifier is designed for low noise characteristics, high CMRR, high input impedance, high IMRR and safety, Auto identification bandwidth unit is composed of AD-converter and PIC micro-controller for real time processing EEG signal. The performance of EEG signal measurement system has been shown the classified bandwidth through the clinical demonstrations.

• Proceedings of the IEEK Conference
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• 2005.11a
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• pp.439-442
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• 2005

An airborne radar performance can be sensitive to the variation of the Doppler center frequency and the spectral spread of the ground clutter return due to the radar platform moving and aspect angle of the scanning beam to the target. In this paper, for the performance test of the airborne pulsed Doppler radar system developed, the high-speed radar data acquisition system is implemented for acquiring the raw radar signal in real-time. Based on the various test scenarios from airborne-platform to the moving platform, the various radar target and clutter signals are collected and their spectrum is analyzed for the verification of the radar performance in the real-time flight test environments.

• Proceedings of the KSR Conference
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• 2010.06a
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• pp.1075-1080
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• 2010

There have been lots of researches for High Performance Digital Signal Processing performance enhancement on a GPU(Graphic Processor Unit). These kinds of parallelizing can enable massive signal processing, so we can have advantage's of processing various of signal processing standards with GPU. In this paper we introduce Low Density Parity Check(LDPC) which is one of the Foward Error Correction(FEC). And we have achieved computational time reduce by using CUDA as a parallelizing scheme.

• Journal of the Korean Institute of Telematics and Electronics B
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• v.30B no.12
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• pp.31-39
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• 1993

In the playback signal processing of a digital magnetic recording system, the major signal processing processes consist of pulse equalization. pulse detection, clock recovery, and data recovery. Equalizer which compensates interference occurrde between pulses recorded in high density on a magnetic media is realized by pulse slimming method, and pulse detection by a integrating detector. Clock recovery from the detector output was accomplished by using PLL. and data recovery to reduce noise effects was carried out by utilizing the three sampling clocks recovered in clock recovery process. In this paper these processes are implemented in hardware and its performance is evaluated by experimenting with a commercial DAT. It was found that the playback signal processor proposed is suitable to the practical high density magnetic recording system.