• Journal of the Institute of Electronics Engineers of Korea SD
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• v.44 no.4
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• pp.43-54
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• 2007

This paper presents design and verification of a face detection hardware for real time application. Face detection algorithm detects rough face position based on already acquired feature parameter data. The hardware is composed of five main modules: Integral Image Calculator, Feature Coordinate Calculator, Feature Difference Calculator, Cascade Calculator, and Window Detection. It also includes on-chip Integral Image memory and Feature Parameter memory. The face detection hardware was verified by using S3C2440A CPU of Samsung Electronics, Virtex4LX100 FPGA of Xilinx, and a CCD Camera module. Our design uses 3,251 LUTs of Xilinx FPGA and takes about 1.96${\sim}$0.13 sec for face detection depending on sliding-window step size, when synthesized for Virtex4LX100 FPGA. When synthesized on Magnachip 0.25um ASIC library, it uses about 410,000 gates (Combinational area about 345,000 gates, Noncombinational area about 65,000 gates) and takes less than 0.5 sec for face realtime detection. This size and performance shows that it is adequate to use for embedded system applications. It has been fabricated as a real chip as a part of XF1201 chip and proven to work.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2015.05a
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• pp.371-373
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• 2015

This paper describes an analysis of hardware design conditions of moving object detection algorithm which is based on effective Gaussian mixture learning (EGML). The simulation model of EGML algorithm is implemented using OpenCV, and it is analyzed that the effects of parameter values on background learning time and moving object detection sensitivity for various images. In addition, optimal design conditions for hardware implementation of EGML-based MOD algorithm are extracted from fixed-point simulations for various bit-width parameters.

• Journal of KIISE:Computing Practices and Letters
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• v.15 no.5
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• pp.350-354
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• 2009

To optimize the performance of software programs, it is important to know certain hardware parameters such as the CPU speed, the cache size, the number of TLB entries, and the parameters of the memory subsystem. There exist several ways to obtain the values of various hardware parameters. Firstly. the values can be taken from the hardware manual. Secondly, the parameters can be obtained by calling functions provided by the operating systems. Finally, hardware detection programs can find the desired values. Such programs are usually executed on PC or server systems and report the CPU speed, the cache size, the number of TLB entries, and so on. However, they do not sufficiently detect the parameters of one of the most important parts of the computer concerning performance, namely the memory bank layout in the memory subsystem. In this paper, we present an algorithm to detect the memory bank parameters. We run an implementation of our algorithm on various embedded systems and compare the detected values with the real hardware parameters. The results show that the presented algorithm detects the cache size, the number of TLB entries, and the memory bank layout with high accuracy.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.19 no.9
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• pp.2153-2160
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• 2015

An analysis of hardware design conditions of moving object detection (MOD) algorithm is described, which is based on effective Gaussian mixture learning (EGML). A simulation model of EGML algorithm is implemented using OpenCV, and the effects of some parameter values on background learning time and MOD sensitivity are analyzed for various images. In addition, optimal design conditions for hardware implementation of EGML-based MOD algorithm are extracted from fixed-point simulations for various bit-widths of parameters. The proposed fixed-point model of the EGML-based MOD uses only half of the bit-width at the expense of the loss of MOD performance within 0.5% when compared with floating-point MOD results.

• ETRI Journal
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• v.25 no.3
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• pp.171-178
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• 2003

To improve the detection performance of surveillance radars with polarization diversity, we developed an adaptive polarimetric processor and compared it with other polarimetric processors. We derived our adaptive polarimetric processor, called the polarization discontinuity detector (PDD), from the generalized likelihood ratio (GLR) test principle for the unspecified target component. We derived closed-form expressions of its probabilities of detection and false alarm, and compared its performance to that of the adaptive polarization canceller (APC) and Kelly's GLR processor. The PDD had a performance similar to Kelly's GLR in Gaussian clutter, and both the PDD and Kelly's GLR, which have embedded constant false alarm rates (CFARs), outperformed the APC, especially when the target polarization state was close to the clutter's polarization state. The important difference is that the PDD is much simpler than Kelly's GLR for hardware/software implementation, because the PDD does not require a costly two-parameter filter bank to cover the unknown target polarization state as Kelly's GLR does.

• International Journal of Automotive Technology
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• v.8 no.2
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• pp.203-209
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• 2007

As the vehicle electronic control technology quickly grows and becomes more sophisticated, a more efficient means than the traditional in-vehicle driving test is required for the design, testing, and tuning of electronic control units (ECU). For this purpose, the hardware-in-the-loop simulation (HILS) scheme is very promising, since significant portions of actual driving test procedures can be replaced by HIL simulation. The HILS incorporates hardware components in the numerical simulation environment, and this yields results with better credibility than pure numerical simulations can offer. In this study, a HILS system has been developed for ESP (Electronic Stability Program) ECUs. The system consists of the hardware component, which that includes the hydraulic brake mechanism and an ESP ECU, the software component, which virtually implements vehicle dynamics with visualization, and the interface component, which links these two parts together. The validity of HIL simulation is largely contingent upon the accuracy of the vehicle model. To account for this, the HILS system in this research used the commercial software CarSim to generate a detailed full vehicle model, and its parameters were set by using design data, SPMD (Suspension Parameter Measurement Device) data, and data from actual vehicle tests. Using the developed HILS system, performance of a commercial ESP ECU was evaluated for a virtual vehicle under various driving conditions. This HILS system, with its reliability, will be used in various applications that include durability testing, benchmarking and comparison of commercial ECUs, and detection of fault and malfunction of ESP ECUs.

• Journal of the Korean Institute of Intelligent Systems
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• v.15 no.6
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• pp.673-681
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• 2005

As it is the most important to make sure security and reliability for nuclear Power Plant, it's considered the most crucial issues to develop a fault detective and diagnostic system in spite of multiple hardware redundancy in itself. To develop an algorithm for a fault diagnosis in the nuclear PWR steam generator, this paper proposes a method based on ART2(adaptive resonance theory 2) neural network that senses and classifies troubles occurred in the system. The fault diagnosis system consists of fault detective part to sense occurred troubles, parameter estimation part to identify changed system parameters and fault classification part to understand types of troubles occurred. The fault classification part Is composed of a fault classifier that uses ART2 neural network. The Performance of the proposed fault diagnosis a18orithm was corroborated by applying in the steam generator.

• International Journal of Automotive Technology
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• v.8 no.5
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• pp.637-650
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• 2007

A new on-line fault detection and isolation(FDI) scheme has been proposed for engines using an adaptive neural network classifier; this paper investigates the robustness of this scheme by evaluating in a wide range of operational modes. The neural classifier is made adaptive to cope with the significant parameter uncertainty, disturbances, and environmental changes. The developed scheme is capable of diagnosing faults in the on-line mode and can be directly implemented in an on-board diagnosis system(hardware). The robustness of the FDI for the closed-loop system with crankshaft speed feedback is investigated by testing it for a wide range of operational modes, including robustness against fixed and sinusoidal throttle angle inputs, change in load, change in an engine parameter, and all changes occurring simultaneously. The evaluations are performed using a mean value engine model(MVEM), which is a widely used benchmark model for engine control system and FDI system design. The simulation results confirm the robustness of the proposed method for various uncertainties and disturbances.

• Journal of the Korean Society of Manufacturing Technology Engineers
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• v.21 no.3
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• pp.459-464
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• 2012

The point of impact, the shot group, and the flight traces depend on the combination of unique features which decide moving traces of the arrow (paradox of the archer, length of the arrow shaft, weight, angle of the feather, and spline of the arrow shaft). The more dense the impact points in the shot group and the earlier elimination of paradox of the archer, the higher assessment is given for the product. However, there is no way to objectively assess the efficiency and quality of the arrow, and there is no numeric data to be used as the basis for comparison with other products. Although capturing the images of flying arrow using a high-speed motion picture camera is possible, we are limited to observation from specific view angle only. Hence, the criteria for efficiency and quality assessment are mostly based on subjective opinions of experts or hunters, or review on consumers' remarks. In this paper, we propose a hardware composition that are based on three detection frames consisting of line lasers and photo diode arrays without the high-speed motion picture camera. Predicated on measured coordinates data, a nobel method for the archer's paradox measurement, a key parameter that determine the arrow's trajectory, and corresponding numerical analysis model is proposed.

• Speech Sciences
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• v.15 no.2
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• pp.67-77
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• 2008

In this paper, we implemented a robust speech recognizer using the TMS320VC33 DSP. For this implementation, we had built speech and noise database suitable for the recognizer using spectral subtraction method for noise removal. The recognizer has an explicit structure in aspect that a speech signal is enhanced through spectral subtraction before endpoints detection and feature extraction. This helps make the operation of the recognizer clear and build HMM models which give minimum model-mismatch. Since the recognizer was developed for the purpose of controlling car facilities and voice dialing, it has two recognition engines, speaker independent one for controlling car facilities and speaker dependent one for voice dialing. We adopted a conventional DTW algorithm for the latter and a continuous HMM for the former. Though various off-line recognition test, we made a selection of optimal conditions of several recognition parameters for a resource-limited embedded recognizer, which led to HMM models of the three mixtures per state. The car noise added speech database is enhanced using spectral subtraction before HMM parameter estimation for reducing model-mismatch caused by nonlinear distortion from spectral subtraction. The hardware module developed includes a microcontroller for host interface which processes the protocol between the DSP and a host.