• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2008.06a
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• pp.169-169
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• 2008

To keep pace with scaling trends of CMOS technologies, high-k metal oxides are to be introduced. Due to their high permittivity, high-k materials can achieve the required capacitance with stacks of higher physical thickness to reduce the leakage current through the scaled gate oxide, which make it become much more promising materials to instead of $SiO_2$. As further studying on high-k, an understanding of the relation between the etch characteristics of high-k dielectric materials and plasma properties is required for the low damaged removal process to match standard processing procedure. There are some reports on the dry etching of different high-k materials in ICP and ECR plasma with various plasma parameters, such as different gas combinations ($Cl_2$, $Cl_2/BCl_3$, $Cl_2$/Ar, $SF_6$/Ar, and $CH_4/H_2$/Ar etc). Understanding of the complex behavior of particles at surfaces requires detailed knowledge of both macroscopic and microscopic processes that take place; also certain processes depend critically on temperature and gas pressure. The choice of $BCl_3$ as the chemically active gas results from the fact that it is widely used for the etching o the materials covered by the native oxides due to the effective extraction of oxygen in the form of $BCl_xO_y$ compounds. In this study, the surface reactions and the etch rate of $Al_2O_3$ films in $BCl_3/Cl_2$/Ar plasma were investigated in an inductively coupled plasma(ICP) reactor in terms of the gas mixing ratio, RF power, DC bias and chamber pressure. The variations of relative volume densities for the particles were measured with optical emission spectroscopy (OES). The surface imagination was measured by AFM and SEM. The chemical states of film was investigated using X-ray photoelectron spectroscopy (XPS), which confirmed the existence of nonvolatile etch byproducts.

• Journal of IKEEE
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• v.17 no.1
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• pp.71-76
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• 2013

AlGaN/GaN HEMTs (High electron mobility transistors) with narrow channel were fabricated and the effect of channel scaling on the device were investigated. The devices were fabricated using e-beam lithography to have same channel length of $1{\mu}m$ and various channel width from 0.5 to $9{\mu}m$. The sheet resistance of the channel was increased corresponding to the decrease of channel width and the increase was larger at the width of sub-${\mu}m$. The threshold voltage of the HEMT with $1.6{\mu}m$ and $9{\mu}m$ channel width was -2.85 V. The transistor showed a variation of 50 mV at the width of $0.9{\mu}m$ and the variation 350 mV at $0.5{\mu}m$. The transconductance of 250 mS/mm was decreased to 150 mS/mm corresponding to the decrease of channel width. Also, the gate leakage current of the HEMT decreased with channel width. But the degree of was reduced at the width of sub-${\mu}m$. It was thought that the variation of the electrical characteristics of the HEMT corresponding to the channel width came from the reduced Piezoelectric field of the AlGaN/GaN structure by the strain relief.