• Smart Structures and Systems
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• v.14 no.6
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• pp.1197-1220
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• 2014

Accurate actuator tracking is critical to achieve reliable real-time hybrid simulation results for earthquake engineering research. The frequency-domain evaluation approach provides an innovative way for more quantitative post-simulation evaluation of actuator tracking errors compared with existing time domain based techniques. Utilizing the Fast Fourier Transform the approach analyzes the actuator error in terms of amplitude and phrase errors. Existing application of the approach requires using the complete length of the experimental data. To improve the computational efficiency, two techniques including data decimation and frequency decimation are analyzed to reduce the amount of data involved in the frequency-domain evaluation. The presented study aims to enhance the computational efficiency of the approach in order to utilize it for future on-line actuator tracking evaluation. Both computational simulation and laboratory experimental results are analyzed and recommendations on the two decimation factors are provided based on the findings from this study.

• 제어로봇시스템학회:학술대회논문집
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• 1994.10a
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• pp.682-688
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• 1994

LSM(Least-Squares Method) has inherent limitation that precise system identification over wide frequency band is difficult especially at low frequency hand. In this paper we propose to use decimation, a spectrum analysis method widely used in signal processing. The merits of decimation are the flexibility of selection of the frequency hand concerned and the function of LPF(Low Pass Filter). In this paper, frequency-domain is divided into separate frequency bands which will be combined into full frequency-domain by using MDM(Multiple Decimation Method). In this way, free selection of sampling frequency for each hand is possible and the low frequency oscillation modes of LSM are avoided.

• Journal of the Institute of Electronics and Information Engineers
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• v.49 no.11
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• pp.141-148
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• 2012

A design of a 32-bit fourth-stage decimation filter decimation filter used in sigma-delta analog-to-digital (A/D) converter is proposed in this work. A four-stage decimation filter with down-sampling factor of 512 and 32-bit output is developed. A multi-stage cascaded integrator-comb (CIC) filter, which reduces the sampling rate by 64, is used in the first stage. Three half-band FIR filters are used after the CIC filter, each of which reduces the sampling rate by two. The pipeline structure is applied in the CIC filter to reduce the power consumption of the CIC. The Canonic Signed Digit (CSD) arithmetic is used to optimize the multiplier structure of the FIR filter. This filter is implemented based on a semi-custom design flow and a 130nm CMOS standard cell library. This decimation filter operates at 98.304 MHz and provides 32-bit output data at an audio frequency of 192 kHz with power consumption of $697{\mu}W$. In comparison to the previous work, this design shows a higher performance in resolution, operation frequency and decimation factor with lower power consumption and small logic utilization.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.38A no.12
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• pp.1145-1147
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• 2013

There are two FFT(Fast Fourier Transform) algorithms, which are DIT(Decimation-In-Time) and DIF(Decimation-In- Frequency). Even the DIF algorithm is more widely used because of its various implementation architectures, the DIT structures have not been investigated. In this paper, the DIT Radix-4 algorithm is derived and its efficient butterfly structure is proposed for SoC(System on a Chip) implementation.

• Journal of Broadcast Engineering
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• v.12 no.3
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• pp.266-277
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• 2007

Recently, Transmitter Identification(TxID) technology has been issued as a technology of ATSC DTV. ATSC DTV networks are comprised of a plurality of transmitters, broadcasting the same signal sing one frequency network(SFN) connected to EDOCR. In this single frequency network, TxID technology has been recognized as a technology in the ATSC DTV system since it enables the broadcast authorities and classify multiple transmitters. However, conventional TxID uses extremely long spreading sequence to identifying transmitters, so it increases H/W complexity and registers. Thus, to solve those hardware problems, we propose an efficient signal processing technology using decimation algorithm. Furthermore, we certified the availability of the proposed algorithm via various simulations.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.16 no.1
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• pp.683-690
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• 2015

Two basic FFT(Fast Fourier Transform) algorithms are the DIT(Decimation-In-Time) and the DIF (Decimation-In-Frequency). In spite of the advantage of the DIT algorithm is to generate a sequential output, various structures have not been made. In this paper, a new DIT Radix-4 FFT butterfly structure are proposed and implemented using Verilog coding. Through synthesis, it is shown that the 64-point FFT is implemented by 6.78 million gates. Since the proposed FFT structure has the advantage of a sequential output, it can be used in OFDM communication SoC(System on a Chip) which need a high speed FFT output.

• Journal of information and communication convergence engineering
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• v.13 no.4
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• pp.235-240
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• 2015

A decimation chain for multi-standard reconfigurable radios is presented for 900-MHz and 1,900-MHz dual-band cellular standards with a data interpolator based on the Lagrange method for adjusting the variable data rate to a fixed data rate appropriate for each standard. The two proposed configurations are analyzed and compared to provide insight into aliasing and the signal bandwidth by means of a newly introduced measure called interpolation error. The average interpolation error is reduced as the ratio of the sampling frequency to the signal BW is increased. The decimation chain and the multi-rate analog-to-digital converter are simulated to compute the interpolation error and the output signal-to-noise ratio. Further, a method to operate the above-mentioned chain under a compressed mode of operation is proposed in order to guarantee continuous packet connectivity for inter-radio-access technologies. The presented decimation chain can be applied to LTE, WCDMA, GSM multi-mode multi-band digital front-end which will ultimately lead to the software-defined radio.

• Journal of the Institute of Convergence Signal Processing
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• v.7 no.2
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• pp.65-72
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• 2006

In digital signal processing, the polyphase decomposition of signal has been often used in the implementation of multirate system. Especially, in the design of digital filter and so forth the method in very useful to improve the performance of various algorithms because it provides the multi-channel for paralled processing. Generally, the polyphase-decomposed signals tend to expand the frequency band by including more high frequencies than original signal from decimation for down sampling. This property brings about the significant limitation in the structure or the performance of digital polyphase signal processing system. In this paper we theoretically propose a perfect band compression and reconstruction method for polyphase component signals, then experimentally show its effectiveness through Matlab simulation.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.16 no.8
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• pp.5579-5585
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• 2015

In FFT(Fast Fourier Transform) implementation, DIT(Decimation-In-Time) and DIF (Decimation-In-Frequency) methods are mostly used. Among them, various DIF structures such as Radix-2/4/8 algorithm have been developed. Compared to the DIF, the DIT structures have not been investigated even though they have a big advantage producing a sequential output. In this paper, a butterfly structure for DIT Radix-8 algorithm is proposed. The proposed structure has smaller latency time because of Radix-8 algorithm in addition to the advantage of the sequential output. In case of 4096-point FFT implementation, the proposed structure has only 4 stages which shows the smaller latency time compared to the 12 stages of Radix-2 algorithm. The proposed butterfly can be used in FFT block required the sequential output and smaller latency time.

• MALSORI
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• no.45
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• pp.63-77
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• 2003

The purpose of voice color conversion is to change the speaker identity perceived from the speech signal. In this paper, we propose a new voice color conversion algorithm through the formant shifting and the spectrum-tilt modification in the frequency domain. The basic idea of this technique is to convert the positions of source formants into those of target speaker's formants through interpolation and decimation and to modify the spectrum-tilt by utilizing the information of both speakers' spectrum envelops. The LPC spectrum is adopted to evaluate the position of formant and the information of spectrum-tilt. Our algorithm enables us to convert the speaker identity rather successfully while maintaining good speech quality, since it modifies speech waveforms directly in the frequency domain.