• Title/Summary/Keyword: fixed-point DSP

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Real-Time Implementation of Acoustic Echo Canceller for Mobile Handset Using TeakLite DSP Core (Teaklite DSP Core 를 이용한 이동통신 단말기용 음향반향제거기의 실시간 구현)

  • Gwon, Hong-Seok;Kim, Si-Ho;Jang, Byeong-Uk;Bae, Geon-Seong
    • Journal of the Institute of Electronics Engineers of Korea SP
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    • v.39 no.2
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    • pp.128-136
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    • 2002
  • In this paper, we developed an acoustic echo canceller in real-time using TeakLite DSP Core, which will be placed in the vocoder chip of a mobile handset. Considering the limited computational capacity given to the acoustic echo canceller in a vocoder chip, we employed a FIR-type adaptive filter using a conventional NLMS algorithm. To begin with, we designed and implemented an acoustic echo canceller with floating-point format C-source code, and then converted it into fixed-point format through integer simulation. Then we programmed and optimized it in the assembler level to make it run ill real-time. After optimization procedure, the implemented echo canceller has approximately 624 words of program memory and 811 words of data memory. With 8 KHz sampling rate and 256 filter taps in the echo canceller that corresponds to 32 msec of echo delay, it requires 14.12 MIPS of computational capacity. For coverage of 16 msec echo delay, i.e., 128 filter taps, 9 MIPS is requited.

A Study of Real-Time Implementation of Dolby AC-3 Decoder in a DVD System (DVD 시스템에 있어서 DOLBY AC-3 디코더의 실시간 구현에 관한 연구)

  • Lee, Won-Woo;Kim, Sung-Ho;Jang, Sung-Chul;Lee, Hee-Soo;Heo, Jae-Hun
    • The Journal of the Acoustical Society of Korea
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    • v.15 no.2
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    • pp.12-20
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    • 1996
  • A real-time Dolby AC-3 decoder has been implemented using a 20-bit fixed point general purpose DSP chip. It is shown that AC-3 decoder of this paper has same performance as decoder of C-simulator on PC. And also, it is applied to DVD player. Especially, in this paper, we proved that it has shorter latency time than that of previous AC-3 decoder.

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Maximum Efficiency Point Tracking Algorithm Using Oxygen Access Ratio Control for Fuel Cell Systems

  • Jang, Min-Ho;Lee, Jae-Moon;Kim, Jong-Hoon;Park, Jong-Hu;Cho, Bo-Hyung
    • Journal of Power Electronics
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    • v.11 no.2
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    • pp.194-201
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    • 2011
  • The air flow supplied to a fuel cell system is one of the most significant factors in determining fuel efficiency. The conventional method of controlling the air flow is to fix the oxygen supply at an estimated constant rate for optimal efficiency. However, the actual optimal point can deviated from the pre-set value due to temperature, load conditions and so on. In this paper, the maximum efficiency point tracking (MEPT) algorithm is proposed for finding the optimal air supply rate in real time to maximize the net-power generation of fuel cell systems. The fixed step MEPT algorithm has slow dynamics, thus it affects the overall efficiency. As a result, the variable step MEPT algorithm is proposed to compensate for this problem instead of a fixed one. The complete small signal model of a PEM Fuel cell system is developed to perform a stability analysis and to present a design guideline. For a design example, a 1kW PEM fuel cell system with a DSP 56F807 (Motorola Inc) was built and tested using the proposed MEPT algorithm. This control algorithm is very effective for a soft current change load like a grid connected system or a hybrid electric vehicle system with a secondary energy source.

Optimized DSP Implementation of Audio Decoders for Digital Multimedia Broadcasting (디지털 방송용 오디오 디코더의 DSP 최적화 구현)

  • Park, Nam-In;Cho, Choong-Sang;Kim, Hong-Kook
    • Journal of Broadcast Engineering
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    • v.13 no.4
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    • pp.452-462
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    • 2008
  • In this paper, we address issues associated with the real-time implementation of the MPEG-1/2 Layer-II (or MUSICAM) and MPEG-4 ER-BSAC decoders for Digital Multimedia Broadcasting (DMB) on TMS320C64x+ that is a fixed-point DSP processor with a clock speed of 330 MHz. To achieve the real-time requirement, they should be optimized in different steps as follows. First of all, a C-code level optimization is performed by sharing the memory, adjusting data types, and unrolling loops. Next, an algorithm level optimization is carried out such as the reconfiguration of bitstream reading, the modification of synthesis filtering, and the rearrangement of the window coefficients for synthesis filtering. In addition, the C-code of a synthesis filtering module of the MPEG-1/2 Layer-II decoder is rewritten by using the linear assembly programming technique. This is because the synthesis filtering module requires the most processing time among all processing modules of the decoder. In order to show how the real-time implementation works, we obtain the percentage of the processing time for decoding and calculate a RMS value between the decoded audio signals by the reference MPEG decoder and its DSP version implemented in this paper. As a result, it is shown that the percentages of the processing time for the MPEG-1/2 Layer-II and MPEG-4 ER-BSAC decoders occupy less than 3% and 11% of the DSP clock cycles, respectively, and the RMS values of the MPEG-1/2 Layer-II and MPEG-4 ER-BSAC decoders implemented in this paper all satisfy the criterion of -77.01 dB which is defined by the MPEG standards.

Real-Time DSP Implementation of IMT-2000 Speech Coding Algorithm (IMT-2000 음성부호화 알고리즘의 실시간 DSP 구현)

  • Seo, Jeong-Uk;Gwon, Hong-Seok;Park, Man-Ho;Bae, Geon-Seong
    • Journal of the Institute of Electronics Engineers of Korea SP
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    • v.38 no.3
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    • pp.304-315
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    • 2001
  • In this paper, we peformed the real-time implementation of AMR(Adaptive Multi-Rate) speech coding algorithm which is adopted for IMT-2000 service using TMS320C6201, i.e., a Texas Instrument´s fixed-point DSP. With the ANSI C source code released from ETSI, optimization is performed to make it run in real-time with memory as small as possible using the C compiler and assembly language. Implemented AMR speech codec has the size of 32.06 kWords program memory, 9.75 kWords data RAM memory, and 19.89 kWords data ROM memory. And, The time required for processing one frame of 20 ms length speech data is about 4.38 ms, and it is short enough for real-time operation. It is verified that the decoded result of the implemented speech codec on the DSP is identical with the PC simulation result using ANSI C code for test sequences. Also, actual sound input/output test using microphone and speaker demonstrates its proper real-time operation without distortions or delays.

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Implementation of the High-Quality Audio System with the Separately Processed Musical Instrument Channels (악기별 분리처리를 통한 고음질 오디오 시스템 구현)

  • Kim, Tae-Hoon;Lee, Sang-Hak;Kim, Dae-Kyung;Lee, Sang-Chan
    • The Journal of the Acoustical Society of Korea
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    • v.32 no.4
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    • pp.346-353
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    • 2013
  • This paper deals with the implementation of a high-quality audio system for karaoke. For improving the key/tempo changes performance, we separated the audio into many musical instrument channels. By separating musical instrument channels, high-quality key/tempo changes can be achieved and we confirmed this using the cross-correlation distribution and the MOS evaluation. The improved audio system was implemented using the TMS320C6747 DSP with fixed/floating-point operations. The implemented audio system can perform the multi-channel WMA decoding, the MP3 encoding/decoding, the wav playing, the EQ, and the key/tempo changes in real time. The WMA channels used for processing the separated instrument channels. The audio system includs the MP3 encoding/decoding function for playing and recording and the wav channel for the effect sound.

A Study on the Self Tuning Control System for Servo Motor Drives (서보전동기 운전을 위한 자기동조제어 시스템에 관한 연구)

  • 오원석;이윤종
    • Journal of the Korean Institute of Telematics and Electronics B
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    • v.30B no.9
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    • pp.122-132
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    • 1993
  • In this paper, a self tuning control algorithm is proposed for the high performance drive of DC servo motor, which is adequate to the servo system having frequent load variation. In order to realization of the algorithm, the control system is developed using a fixed point high speed digital signal processor. TMS320C25. Control algorithm is composed of two parts. One is estimation law part using recursive least mean square method, the other is control law part using minimum variance control method. For the purpose of easiness of applying adaptive algorithm, developed control system is based o PC-DSP structure which can develop, debug programs and monitor the dynamic behaviors,etc. Through computer simulation and experimental results, it was verified that proposed control system could estimate system parameters and was robust to the variation of the load and as a result, was adequate to the servo motor drives.

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Fixed-point Implementation of LPD Decoder in MPEG-D USAC (MPEG-D USAC : LPD 복호화기의 고정 소수점 알고리즘 구현)

  • Song, Eunwoo;Song, Jeongook;Kang, Hong-Goo
    • Proceedings of the Korean Society of Broadcast Engineers Conference
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    • 2012.07a
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    • pp.254-256
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    • 2012
  • 본 논문에서는 MPEG-D 오디오 서브그룹에서 진행 중인 Unified Speech and Audio Coding (USAC) 표준의 Linear Prediction Domain (LPD) 복호화기 모듈을 고정소수점 알고리즘으로 제안한다. USAC 부호화기는 두 개의 최신 음성-오디오 부호화기가 융합된 형태로, 음성 및 오디오 신호에 대하여 우수한 성능을 갖는 부호화기이다. USAC의 표준 완료와 본격적인 서비스화에 앞서서 USAC LPD 복호화기의 구조적인 특성을 분석하고, Digital Signal Processor (DSP)구현을 위한 LPD 복호화기의 고정소수점 알고리즘을 구축하는 동시에 모듈의 복잡도를 측정하고자 한다. 또한 고정소수점 알고리즘으로 구현된 LPD 복호화기와 기존의 부동소수점 복호화기의 성능을 비교하고, LPD 복호화기의 두 가지 부호화 모드에 따른 복잡도 이슈를 다루도록 한다.

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Design and implementation of a speech coder for CDMA cellular system (CDMA 이동통신 시스템용 음성부호화기 설계 및 구현)

  • 장석진;윤병식;김재원;이원명;윤병우;이인성;최송인;임명섭;한기철
    • Journal of the Korean Institute of Telematics and Electronics B
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    • v.33B no.10
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    • pp.72-79
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    • 1996
  • We developed a speech coder that can transfer data as well as speech for CDMA digital cellular system. We describe the design method of the speech coder that uses QCELP algorithm for speech coding. The speech coder is implemented on a single fixed-point DSP chip (TMS320C50). the coder has the complexity such as 4K words in RAM, 10K words in ROM, and 33 MIPS in execution time. The developed speech coder is fully tested and successfully working on the CDMA base station system.

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Parameters Estimation of Five-phase Squirrel-Cage Induction Motor (5상 농형 유도전동기의 정수 추정)

  • Kim, Min-Huei
    • The Transactions of the Korean Institute of Electrical Engineers P
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    • v.61 no.4
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    • pp.199-205
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    • 2012
  • This paper propose a improved parameter estimations of five-phase squirrel-cage induction motor(IM) for speed control system on field oriented control(FOC). In order to high performance control of ac the motors using a FOC and DTC(direct torque control) algorithm, there are required precise motor parameters for slip calculation, flux observer, controller gain, rotor position and speed estimation, and so on. We are suggest a estimation method of the motor parameters that developing five-phase squirrel-cage IM have a stator of concentrated winding for experimental. There are results of stator winding test, no-load test, locked rotor test, and obtained equivalent circuits using manufactured experimental apparatus. For presenting the superior performance of the speed control system in adapted the parameters, experimental results are presented using a 32-bit fixed point TMS320F2812 DSP with 1.5[KW] IM.