• Journal of the Institute of Electronics Engineers of Korea SP
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• v.37 no.5
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• pp.115-123
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• 2000

In this paper, a block FIR(Finite Impulse Response) filtering architecture is proposed for IF digital down converter. Digital down converter consists of digital mixers. decimation filters and down samplers. In this proposed structure, it is shown that a efficient parallel decimation filter architecture can be produced by cancellation of inherent up sampling of the block filter and following down sampler Furthermore. it is shown that computational complexity of the proposed architecture is reduced by exploiting the block FIR structure and zero values of the digital mixers.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.27 no.4A
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• pp.324-329
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• 2002

In the high-speed/low-power digital filter applications like wireless communication systems, canonical signed digit(CSD) linear phase finite impulse response(FIR) filter structures are widely investigated. In this paper, we propose a high-speed/low-power CSD linear phase FIR filter structure using vertical common sub-expression. In the conventional linear phase CSD filter, horizontal common sub-expressions are utilized due to the inherent horizontal common sub-expression of symmetrical filter coefficients. We use the fact that their MSBs are also equal since adjacent filter coefficients have similar values in the linear phase filter Through the examples, it is shown that our proposed structure is more efficient in case that precision of implementation is lower, and tap length are longer.

• 제어로봇시스템학회:학술대회논문집
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• 2005.06a
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• pp.2516-2520
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• 2005

In this paper, finite impulse response (FIR) smoothers are proposed for discrete-time systems. The proposed FIR smoother is designed under the constraints of linearity, unbiasedness, FIR structure, and independence of the initial state information. It is also obtained by directly minimizing the performance criterion with unbiased constraints. The approach to the MVF smoother proposed in this paper is logical and systematic, while existing results have heuristic assumption, such as infinite covariance of the initial state. Additionally, the proposed MVF smoother is based on the general system model that may have the singular system matrix and has both system and measurement noises. Thorough simulation studies, it is shown that the proposed MVF smoother is more robust against modeling uncertainties numerical errors than fixed-lag Kalman smoother which is infinite impulse response (IIR) type estimator.

• ETRI Journal
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• v.46 no.4
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• pp.619-632
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• 2024

Medical signal processing requires noise and interference-free inputs for precise segregation and classification operations. However, sensing and transmitting wireless media/devices generate noise that results in signal tampering in feature extractions. To address these issues, this article introduces a finite impulse response design based on a two-level transpose Vedic multiplier. The proposed architecture identifies the zero-noise impulse across the varying sensing intervals. In this process, the first level is the process of transpose array operations with equalization implemented to achieve zero noise at any sensed interval. This transpose occurs between successive array representations of the input with continuity. If the continuity is unavailable, then the noise interruption is considerable and results in signal tampering. The second level of the Vedic multiplier is to optimize the transpose speed for zero-noise segregation. This is performed independently for the zero- and nonzero-noise intervals. Finally, the finite impulse response is estimated as the sum of zero- and nonzero-noise inputs at any finite classification.

• The Transactions of the Korean Institute of Electrical Engineers D
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• v.54 no.9
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• pp.570-576
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• 2005

In FIR (Finite Impulse Response) filter applications, Nth-band FIR digital filters are known to be important due to their reduced computational requirements. The conventional methods for designing FIR filters use iterative approaches such as the well-known Parks-Mcclellan algorithm. the Parks-Mcclellan algorithm is also used to design Nth-band FIR digital filters. But a disadvantage of the Parks-McClellan algorithm Is that it needs a good amount of design time. This paper describes a direct design method for third-band FIR Filters using Chebyshev polynomial, which provide a reduction in design time over indirect methods such as the Parks-McClellan algorithm. The response of the resulting filter is equi-ripple in passband. The proposed method of design produces a passband response that is equi-ripple to within a minuscule error, compare to that of the Parks-McClellan algorithm.

• The Transactions of the Korean Institute of Electrical Engineers D
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• v.54 no.10
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• pp.630-638
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• 2005

In FIR (Finite Impulse Response) filter applications, Nth-band F]U digital filters are known to be important due to their reduced computational requirements. The conventional methods for designing F]U filters use iterative approaches such as the well-known Parks-Mcclellan algorithm. The Parks-Mcclellan algorithm is also used to design Nth-band FIR digital filters. But a disadvantage of the Parks-Mcclellan algorithm is that it needs a good amount of design time. This paper describes a direct design method for Nth-band FIR Filters using Chebyshev polynomials, which provides a reduced design time over indirect methods such as the Parks-Mcclellan algorithm. The response of the resulting filter is equiripple in passband. Our proposed method produces a passband response that is equripple to within a minuscule error, comparable to that of the Parks-Mcclellan algorithm.

• Journal of Electrical Engineering and Technology
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• v.4 no.3
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• pp.423-428
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• 2009

In FIR (Finite Impulse Response) filter applications, Nth-band FIR digital filters are known to be important due to their reduced computational requirements. The conventional methods for designing FIR filters use iterative approaches such as the well-known Parks-McClellan algorithm. The Parks-McClellan algorithm is also used to design Nth-band FIR digital filters after Mintzer's research. However, a disadvantage of the Parks-McClellan algorithm is that it needs a large amount of design time. This paper describes a direct design method for Nth-band FIR Filters using Chebyshev polynomials, which provides a reduced design time over indirect methods such as the Parks-McClellan algorithm. The response of the resulting filter is equi-ripple in passband. Our proposed method produces a passband response that is equi-ripple to within a minuscule error, comparable to that of Mintzer's design method which uses the Parks-McClellan algorithm.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2011.05a
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• pp.310-312
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• 2011

In complex noise environment, digital filter is being used to obtain, transport and storage original voice or image signal. Digital filter can be largely separated FIR(Finite duration impulse response) filter and IIR(Infinite duration impulse response) filter. Among FIR filter, window function has characteristic of linear phase and as can be easily set pass-band frequency, cutoff frequency and so on. In this paper, We compared with established method using transient characteristic and peak side-lobe in order to check filter characteristics after we designed the existing variants of the window function.

• Proceedings of the Korea Society of Information Technology Applications Conference
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• 2002.11a
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• pp.343-349
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• 2002

본 논문에서는 모듈성과 확장성을 갖는 시스톨릭 어레이를 이용한 FIR(finite impulse response) 디지털필터의 구현에 대하여 기술한다. 차분방정식 혹은 전달함수가 주어질 때 기본소자를 이용한 FIR 디지털필터 설계를 위한 2차원 DG(dependence graph)로부터 1차원 시스톨릭 어레이를 유도한 후 유도된 시스톨릭 어레이를 RT 수준에서 VHDL로 모델링하여 동작을 검증하였다 검증된 시스톨릭 어레이를 이용한 FIR 디지털필터는 Hynix에서 제공하는 0.35$\mu\textrm{m}$ 셀 라이브러리와 FPGA칩인 XCV200E을 사용하여 합성 및 구현되었다.

• Proceedings of the Korea Society for Industrial Systems Conference
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• 2002.11a
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• pp.343-349
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• 2002

본 논문에서는 모듈성과 확장성을 갖는 시스톨릭 어레이를 이용한 FIR(finite impulse response) 디지털필터의 구현에 대하여 기술한다. 차분방정식 혹은 전달함수가 주어질 때 기본소자를 이용한 FIR 디지털필터 설계를 위한 2차원 DG(dependence graph)로부터 1차원 시스톨릭 어레이를 유도한 후 유도된 시스톨릭 어레이를 RT 수준에서 VHDL로 모델링하여 동작을 검증하였다. 검증된 시스톨릭 어레이를 이용한 FIR 디지털필터는 Hynix에서 제공하는 0.35$\mu\textrm{m}$ 셀 라이브러리와 FPGA칩인 XCV200E을 사용하여 합성 및 구현되었다.