• Title/Summary/Keyword: encoder optimization

Search Result 92, Processing Time 0.028 seconds

A Diamond Web-grid Search Algorithm Combined with Efficient Stationary Block Skip Method for H.264/AVC Motion Estimation (H.264/AVC 움직임 추정을 위한 효율적인 정적 블록 스킵 방법과 결합된 다이아몬드 웹 격자 탐색 알고리즘)

  • Jeong, Chang-Uk;Choi, Jin-Ku;Ikenaga, Takeshi;Goto, Satoshi
    • Journal of Internet Computing and Services
    • /
    • v.11 no.2
    • /
    • pp.49-60
    • /
    • 2010
  • H.264/AVC offers a better encoding efficiency than conventional video standards by adopting many new encoding techniques. However, the advanced coding techniques also add to the overall complexity for H.264/AVC encoder. Accordingly, it is necessary to perform optimization to alleviate the level of complexity for the video encoder. The amount of computation for motion estimation is of particular importance. In this paper, we propose a diamond web-grid search algorithm combined with efficient stationary block skip method which employs full diamond and dodecagon search patterns, and the variable thresholds are used for performing an effective skip of stationary blocks. The experimental results indicate that the proposed technique reduces the computations of the unsymmetrical-cross multi-hexagon-grid search algorithm by up to 12% while maintaining a similar PSNR performance.

An HEVC intra encoder sharing DCT with RDO for a low complex hardware (하드웨어 복잡도를 줄이기 위한 RDO내 DCT 공유구조의 HEVC 화면내 예측부호화기)

  • Lee, Sukho;Jang, Juneyoung;Byun, Kyungjun;Eum, Nakwoong
    • Smart Media Journal
    • /
    • v.3 no.4
    • /
    • pp.16-21
    • /
    • 2014
  • HEVC is the latest joint video coding standard with ITU-T SG16 WP and ISO/IEC JTC1/SC29/WG11. Its coding efficiency is about two times compared to H.264 high profile. Intra prediction has 35 directional modes including dc and planer. However an accurate mode decision on lots of modes with SSE is too costly to implement it with hardware. The key idea of this paper is a DCT shared architecture to reduce the complexity of HEVC intra encoder. It is to use same DCT block to quantize as well as to calculate SSE in RDO. The proposed intra encoder uses two step mode decision to lighten complexity with simplified RDO blocks and shares the transform resources. Its BD-rate increase is negligible at 20% on hardware aspect and the operating clock frequency is 300MHz@60fps on FHD ($1920{\times}1080$) image.

MP3 Encoder Chip Design Based on HW/SW Co-Design (하드웨어 소프트웨어 Co-Design을 통한 MP3 부호화 칩 설계)

  • Park Jong-In;Park Ju Sung;Kim Tae-Hoon
    • The Journal of the Acoustical Society of Korea
    • /
    • v.25 no.2
    • /
    • pp.61-71
    • /
    • 2006
  • An MP3 encoder chip has been designed and fabricated with the hardware and software co-design concepts. In the aspect of the software. the calculation cycles of the distortion control loop. which requires most of the calculation cycles in MP3 encoding procedure. have been reduced to $67\%$ of the original algorithm through the 'scale factor Pre-calculation'. By using a floating Point 32 bit DSP core and designing the FFT block with the hardware. we can get the additional reduction of the calculation cycles in addition to the software optimization. The designed chip has been verified using HW emulation and fabricated via 0.25um CMOS technology The fabricated chip has the size of $6.2{\time}6.2mm^2$ and operates normally on the test board in the qualitative and quantitative aspect.

Fast Coding Mode Decision for H.264 Video Coding (H.264 동영상 압축을 위한 고속 부호화 모드 결정 방법)

  • 이제윤;전병우
    • Journal of the Institute of Electronics Engineers of Korea SP
    • /
    • v.41 no.6
    • /
    • pp.165-173
    • /
    • 2004
  • H.264 is the newest international video coding standard that provides high coding efficiency. A macroblock in H.264 has 7 different motion-compensation block sizes in the Inter mode, and several different prediction directions in the Intra mode. In order to achieve as highest coding efficiency as possible, H.264 reference model employs complex mode decision technique based on rate-distortion (RD) optimization which requires high computational complexity. In this paper, we propose two techniques -'early SKIP mode decision' and 'selective intra mode decision' - which can further reduce the computational complexity. Simulation results show that without considerable performance degradation, the proposed methods reduce encoding time by 30% on average and save the number of computing rate-distortion cost by 72%.

Analysis of MPEG-4 Encoder for Object-based Video (실시간 객체기반 비디오 서비스를 위한 MPEG-4 Encoder 분석)

  • Kim Min Hoon;Jang Euee Seon;Lee Sun young;Moon Seok ju
    • Journal of the Institute of Electronics Engineers of Korea SP
    • /
    • v.41 no.1
    • /
    • pp.13-20
    • /
    • 2004
  • In this paper, we have analyzed the current MPEG-4 video encoding tools and proposed efcient coding techniques that reduce the complexity of the encoder. Until recently, encoder optimization without shape coding has been a major concern in video for wire/wireless low bit rate coding services. Recently, we found out that the computational complexity of MPEG-4 shape coding plays a very important role in the object-based coding through experiments. We have made an experiment whether we could get optimized object-based coding method through successfully combining latest optimized texture coding techniques with our proposed optimized shape coding techniques. In texture coding, we applied the MVFAST method for motion estimation. We chose not to use IVOPF(Intelligent VOP Formation) but to use TRB(Tightest Rectangular Boundary) for positioning VOP and, finally, to eliminate the spiral search of shape motion estimation to reduce the complexity in shape coding. As a result of experiment, our proposed scheme achieved improved time complexity over the existing reference software by $57.3\%$ and over the optimized method on which only shape coding was applied by $48.7\%$, respectively.

A Fast Intra Prediction Method Using Quadtree Structure and SATD in HEVC Encoder (쿼드트리 구조와 SATD를 이용한 HEVC 인코더의 고속 인트라 예측 방식)

  • Kim, Youngjo;Kim, Jaeseok
    • Journal of the Institute of Electronics and Information Engineers
    • /
    • v.51 no.3
    • /
    • pp.129-138
    • /
    • 2014
  • This paper proposes a fast intra prediction method to reduce encoding time for the HEVC(high-efficiency video coding) encoder. The proposed fast Intra prediction method uses quadtree structure and SATD(Sum of Absolute Transformed Differences). In HEVC, a $8{\times}8$ SATD value using $8{\times}8$ hadamard transform is used to calculate a SATD value for $8{\times}8$ or larger blocks. The proposed method calculates the best SATD value by using each $8{\times}8$ SATD result in $16{\times}16$ or larger blocks. After that, the proposed method removes a candidate mode for RDO(Rate-Distortion Optimization) based on comparing SATD of the candidate mode and the best SATD. By removing candidate modes, the proposed method reduces the operation of RDO and reduces total encoding time. In $8{\times}8$ block, the proposed method uses additional $4{\times}4$ SATD to calculat the best SATD. The experimental results show that the proposed method achieved 5.08% reduction in encoding time compared to the HEVC test model 12.1 encoder with almost no loss in compression performance.

Fast Mode Decision using Block Size Activity for H.264/AVC (블록 크기 활동도를 이용한 H.264/AVC 부호화 고속 모드 결정)

  • Jung, Bong-Soo;Jeon, Byeung-Woo;Choi, Kwang-Pyo;Oh, Yun-Je
    • Journal of the Institute of Electronics Engineers of Korea SP
    • /
    • v.44 no.2 s.314
    • /
    • pp.1-11
    • /
    • 2007
  • H.264/AVC uses variable block sizes to achieve significant coding gain. It has 7 different coding modes having different motion compensation block sizes in Inter slice, and 2 different intra prediction modes in Intra slice. This fine-tuned new coding feature has achieved far more significant coding gain compared with previous video coding standards. However, extremely high computational complexity is required when rate-distortion optimization (RDO) algorithm is used. This computational complexity is a major problem in implementing real-time H.264/AVC encoder on computationally constrained devices. Therefore, there is a clear need for complexity reduction algorithm of H.264/AVC such as fast mode decision. In this paper, we propose a fast mode decision with early $P8\times8$ mode rejection based on block size activity using large block history map (LBHM). Simulation results show that without any meaningful degradation, the proposed method reduces whole encoding time on average by 53%. Also the hybrid usage of the proposed method and the early SKIP mode decision in H.264/AVC reference model reduces whole encoding time by 63% on average.

Edge and Relative RMD Cost based Fast Intra Prediction Mode Decision in HEVC (에지 및 상대적 RMD 비용을 고려한 HEVC 고속 화면내 부호화 모드 결정 방법)

  • Gwon, Dae-Hyeok;Choi, Haechul
    • Journal of the Institute of Electronics and Information Engineers
    • /
    • v.51 no.10
    • /
    • pp.154-163
    • /
    • 2014
  • In this paper, there is suggested a fast intra prediction mode decision method in HEVC. To reduce the number of candidates in rough mode decision (RMD) process and rate-distortion optimization (RDO) process, the edge information and relative RMD cost are utilized. The experiment results show that the proposed method reduces encoding run-time by 26.81% with a negligible coding loss of 0.79% BD-rate on average.

Joint Optimization of Source Codebooks and Channel Modulation Signal for AWGN Channels (AWGN 채널에서 VQ 부호책과 직교 진폭변조신호 좌표의 공동 최적화)

  • 한종기;박준현
    • The Journal of Korean Institute of Communications and Information Sciences
    • /
    • v.28 no.6C
    • /
    • pp.580-593
    • /
    • 2003
  • A joint design scheme has been proposed to optimize the source encoder and the modulation signal constellation based on the minimization of the end-to-end distortion including both the quantization error and channel distortion. The proposed scheme first optimizes the VQ codebook for a fixed modulation signal set, and then the modulation signals for the fixed VQ codebook. These two steps are iteratively repeated until they reach a local optimum solution. It has been shown that the performance of the proposed system can be enhanced by employing a new efficient mapping scheme between codevectors and modulation signals. Simulation results show that a jointly optimized system based on the proposed algorithms outperforms the conventional system based on a conventional QAM modulation signal set and the VQ codebook designed for a noiseless channel.

Implementation of Feedback Controller on the Servo System (교류서보계의 궤환제어 구현)

  • Chun, Sam-Suk;Park, Chan-Won
    • Proceedings of the KIEE Conference
    • /
    • 2006.07b
    • /
    • pp.719-720
    • /
    • 2006
  • In the mechanical system, optimization of motion control is very essential in the aspect of automation technique progress. In the servo system, the function of controller is very important but most of the controllers have played only the role of pulse generator because the controller with main function is very expensive. In this thesis, the system was composed of PC, commonly used driver AC servo motor and a produced control board. The PC transmit a gain, a locus data to a driver and controller. At the same time, it converts imformation from the controller and convert them into data and offer an output with graph. The role of a controller is to trasmit a locus data to a driver and counting the pulse on the phase of an encoder to the PC. We have performed the experiment in order to confirm with variable PID parameter capable of the optimization of gain tuning with the counting of feedback control sensor signal with regard to the external interface into the system, such as torque. Based on the experiment result, we have confirmed as follows: First, it was confirmed that we could easily input control factors P.I Gain, constant $K_P,\;K_I$ into PC. Second, not only pulse generator function was possible, but with this pulse it was also possible to count using software with PIC chip. And third, using the multi-purpose PIC micro chip, simple operation and the formation of small size AC Servo Controller was possible.

  • PDF