• Journal of the Microelectronics and Packaging Society
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• v.9 no.1
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• pp.49-52
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• 2002

This study demonstrated the feasibility of tape casting method to fabricate soda borosilicate glass-coated stainless steel electrostatic chucks(ESC) for low temperature semiconductor processes. Glass coating on the stainless steel substrate was 125 $\mu\textrm{m}$ thick. The adhesion of glass coating was found to be excellent such that it was able to withstand temperature cycling to over $300^{\circ}C$ without cracking and delamination. The electrostatic clamping pressure generally followed the theoretical voltage-squared curve except at elevated temperatures and high applied voltages. The deviations at elevated temperatures and high applied voltages are due to increased leakage current as the electrical resistivity of glass coating drops.

• Journal of the Microelectronics and Packaging Society
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• v.8 no.3
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• pp.31-36
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• 2001

Dielectric material which is suitably designed for the application of the high-temperature electrostatic chucks(HTESCS) has been developed. Electrical resistivities and dielectric constants of the dielectric layer satisfy the demands for the proper operation of HTESC, and coefficient of thermal expansion(CTE) of the dielectric material matches well that of the bottom insulator so that it secures stable structure. In order to minimize particle contaminations, borosilicate glass(BSG) is selected as a bonding layer between dielectric layer and bottom insulator, and silver is used as a electrode. BSG is solidly bonded between upper dielectric and bottom insulator, and no diffusions or reactions are observed among silver electrode, dielectric, and glass layers. The chucking characteristics of the fabricated HTESC are found to be superior to those of the commercialized one.

• Journal of the Semiconductor & Display Technology
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• v.22 no.3
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• pp.14-20
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• 2023

The electrostatic chuck is a technology that uses electroadhesion to attach objects and is widely used in semiconductor and display processes. This research conducted Maxwell by varying parameters to examine the distribution and variations of chucking force in a bipolar-type ESC. The parameters that were changed include the material properties of the dielectric layer and attachment substrate, applied voltage to the electrode, and the gap and width between the electrodes. The analysis results showed that as the relative permittivity of the dielectric layer and substrate increased, the chucking force also increased, with the relative permittivity of the substrate having a greater impact on the chucking force. And increasing the applied voltage led to an increase in both the chucking force and its rate of change. Lastly, as the gap between the electrodes increased, the chucking force rapidly decreased until a certain distance, after which the decrease became less significant. On the contrary, increasing the electrode width resulted in a rapid increase in the chucking force until a certain width, beyond which the increase became less pronounced, eventually converging to a chucking force of 1700 Pa. This paper is expected to have high potential for the development and research of ESC for OLED deposition.

• Journal of the Semiconductor & Display Technology
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• v.20 no.2
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• pp.92-97
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• 2021

The importance of processes in cryogenic environments is increasing in a way to address problems such as critical dimension (CD) narrow and bottlenecks in micro-processing. Accordingly, in this paper, we proceed with the design and analysis of Electrostatic Chuck(ESC) and Coolant in cryogenic environments, and present optimal model conditions to provide the temperature distribution analysis of ESC in these environments and the appropriate optimal design. The wafer temperature uniformity was selected as the reference model that the operating conditions of the refrigerant of the liquid nitrogen in the doubled aluminum path were excellent. Design of simulation (DOS) was carried out based on the wheel settings within the selected reference model and the classification of three mass flow and diameter case, respectively. The comparison between factors with p-value less than 0.05 indicates that the optimal design point is when five turns of coolant have a flow rate of 0.3 kg/s and a diameter of 12 mm. ANOVA determines the interactions between the above factor, indicating that mass flow is the most significant among the parameters of interests. In variable selection procedure, Case 2 was also determined to be superior through the two-Sample T-Test of the mean and variance values by dividing five coolant wheels into two (Case 1 : 2+3, Case 2: 3+2). Finally, heat transfer analysis processes such as final difference method (FDM) and heat transfer were also performed to demonstrate the feasibility and adequacy of the analysis process.

• Journal of the Korean Ceramic Society
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• v.44 no.2 s.297
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• pp.116-123
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• 2007

Electrical properties of AlN ceramics sintered with 1 wt% $Y_2O_3$ have been investigated. From the impedance spectroscopy, electrical conductivity of grain boundary was found to be much lower than that of grain. DC conductivity measurement showed the electrode polarization effects caused by blocking electrode. The heat-treatment at $1700^{\circ}C$ of the specimen sintered at $1850^{\circ}C$ transformed continuous pain boundary phases along triple boundary junctions into isolated particles in grain comers. The heat-treatment induced decreases both in grain and grain boundary conductivity, and in DC electrical conductivities. From the analysis on the transference number, ionic conductivity was shown to be more dominant than electron conductivity, which was due to ion compensation mechanism during oxygen incorporation into grain.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2006.06a
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• pp.71-72
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• 2006

We report on plasma damage free chemical vapor deposition technique for the thin film passivation of organic light emitting diodes (OLEDs), organic thin film transistor (OTFT) and flexible displays using catalyzer enhanced chemical vapor deposition (CECVD). Specially designed CECVD system has a ladder-shaped tungsten catalyzer and movable electrostatic chuck for low temperature deposition process. The top emitting OLED with thin film $SiN_x$ passivation layer shows electrical and optical characteristics comparable to those of the OLED with glass encapsulation. This indicates that the CECVD technique is a promising candidate to grow high-quality thin film passivation layer on OLED, OTFT, and flexible displays.

• Journal of the Semiconductor & Display Technology
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• v.22 no.4
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• pp.7-12
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• 2023

The edge ring placed on the outside of the electrostatic chuck (ESC) is a key component for protecting the ESC and controlling the etching uniformity of the edge of the wafer. Therefore, it is very important to understand the etching phenomenon of edge rings for edge ring management and equipment homeostasis. In this study, a specimen with SiO₂ hard mask and underlying Si mold was installed on the edge ring surface and the etching results were measured by varying the edge ring 2MHz RF power. By developing PI-VM model with high prediction accuracy and analyzing the roles of key parameters in the model, we were able to evaluate the effect of plasma and sheath characteristics around the edge ring on edge ring erosion. This analysis method provided information necessary for edge ring maintenance and operation.

• Journal of the Korean Crystal Growth and Crystal Technology
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• v.16 no.3
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• pp.116-120
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• 2006

We have investigated plasma spray coated $Al_2O_3$ layers on Al-60 series substrates for development of wafer electrostatic chuck in semiconductor dry etching system. Samples were prepared without/with cooling bar on backside of samples, at various distances, and with different powder feed rates. There were many cracks and pores in the $Al_2O_3$ layers coated on Al-60 series substrates without cooling bar on the backside of samples. But the cracks and pores were almost disappeared in the $Al_2O_3$ layers on Al-60 series substrates coated with cooling bar on the back side of samples, 15 g/min. powder feed rate and various 60, 70, 80 mm working distances. Then the surface morphology was not changed with various working distances of 60, 70, 80 mm. When the powder feed rate was changed from 15 g/min to 20 g/min, the crack did not appear, but few pores appeared. Also the $Al_2O_3$ layer was coated with many small splats compared with $Al_2O_3$ layer coated with 15 g/min powder feed rate. The deposited rate of $Al_2O_3$ layer was higher when the process was done without cooling bar on the back side of sample than that with cooling bar on the back side of sample.

• Journal of the Semiconductor & Display Technology
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• v.20 no.1
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• pp.32-36
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• 2021

The number of processes in the manufacture of semiconductors, displays and solar cells is increasing. And as the processes is performed, multiple layers of films and various patterns are formed on the wafer. At this time, substrate warpage occurs due to the difference in stress between each film and pattern formed on the wafer. the substrate warping phenomenon occurs due to the difference in stress between each film and pattern formed on the wafer. We developed a new warpage measurement method to measure wafer warpage during real-time processing. We performed an experiment to measure the presence and degree of warpage of the substrate in real time during the process by adding only measurement equipment for applying additional electrical signals to the existing ESC and detecting the change of the additional electric signal. The additional electrical measurement signal applied at this time is very small compared to the direct current (DC) power applied to the electrostatic chuck whit a frequency that is not generally used in the process can be selectively used. It was confirmed that the measurement of substrate warpage can be easily separated from other power sources without affecting.

• Journal of the Korean Crystal Growth and Crystal Technology
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• v.28 no.6
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• pp.235-242
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• 2018

High temperature electrical conductivity of Aluminum Nitride (AlN) ceramics sintered with $Y_2O_3$ as a sintering aid has been investigated with respect to various sintering conditions and MgO-dopant. When magnesium oxide is added as a dopant, liquid glass-film and crystalline phases such as spinel, perovskite are formed as second phases, which affects their electrical properties. According to high temperature impedance analysis, MgO doping leads to reduction of activation energy and electrical resistivity due to AlN grains. On the other hand, the activation energy and electrical resistivity due to grain boundary were increased by MgO doping. This is a result of the formation of liquid glass film in the grain boundary, which contains Mg ions, or the elevation of schottky barrier due to the precipitation of Mg in the grain boundary. For the annealed sample of MgO doped AlN, the electrical resistivity and activation energy were increased further compared to MgO doped AlN, which results from diffusion of Mg in the grains from grain boundary as shown in the microstructure.