• 제목/요약/키워드: edge fringing field effect

검색결과 5건 처리시간 0.024초

Programming Characteristics on Three-Dimensional NAND Flash Structure Using Edge Fringing Field Effect

  • Yang, Hyung Jun;Song, Yun-Heub
    • JSTS:Journal of Semiconductor Technology and Science
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    • 제14권5호
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    • pp.537-542
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    • 2014
  • The three-dimensional (3-D) NAND flash structure with fully charge storage using edge fringing field effect is presented, and its programming characteristic is evaluated. We successfully confirmed that this structure using fringing field effect provides good program characteristics showing sufficient threshold voltage ($V_T$) margin by technology computer-aided design (TCAD) simulation. From the simulation results, we expect that program speed characteristics of proposed structure have competitive compared to other 3D NAND flash structure. Moreover, it is estimated that this structural feature using edge fringing field effect gives better design scalability compared to the conventional 3D NAND flash structures by scaling of the hole size for the vertical channel. As a result, the proposed structure is one of the candidates of Terabit 3D vertical NAND flash cell with lower bit cost and design scalability.

PCB선로의 끝단효과에 의한 특성임피던스 및 전자계분포에 관한 연구 (A Study on Characteristic Impedance and Electromagnetic Distribution by the Edge Effect of Printed Cicuit Board Line)

  • 장인범;박건호;이수길;김성렬;김용주;김영천;이준웅
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 1997년도 춘계학술대회 논문집
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    • pp.323-325
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    • 1997
  • Conventionally it is asummed that the microstrip line conductor has a rectangular cross-section. but the additive and substactive processes used to create conductors for PCBs produce a conductor of approximately Trapezoidal cross-section. For wide Strip line, the thickness and edge effect will be small since most of capacitance is parallel plate rather than fringing and we can ignore the cross-section. For narrow strip lines, the edge effect become immportant. So in this paper, we measure the chracteristic impedance of microstripline by Vector Analyzer and simulate the electromagnetic field of microstripline using finite element method with edge angle.

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고온초전도 마이크로스트립 패치 안테나의 근거리 전자장 해석 (Near electromagnetic field analysis of HTS microstrip patch antenna)

  • 정동철;허원일;김민기;한태희;한병성
    • E2M - 전기 전자와 첨단 소재
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    • 제9권8호
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    • pp.783-788
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    • 1996
  • In this paper, the high-$T_c$ , superconductor (HTS) microstrip patch antenna which is directly coupled to a microstrip transmission line is designed and the numerical solution which evaluate near electromagnetic field of HTS antenna is presented. This solution uses the interpolation function with the vector edge triangular element. The advantage of this element is the elimination of spurious solutions attributed to the lack of enforcement of the divergence condition. The results of this method have a good agreement with $TM_10$ mode in HTS microstrip patch antenna and show that the computation of resonant length considering the fringing capacitance effect at radiating edge are proper.

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근거리장에서 NFS를 사용한 차폐효율 평가방법에 관한 연구 (A Study on the Evaluation Method of Shielding Effectiveness using NFS in Near-Field Tests)

  • 박정열;송인채;김부균;김은하
    • 전자공학회논문지
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    • 제53권8호
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    • pp.76-82
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    • 2016
  • 본 논문에서는 근거리장에서 NFS(near field scanning)를 사용한 차폐효율 평가 방법을 통해 CNT(carbon nanotube) 필름의 차폐 특성을 분석하였다. 차폐 특성 평가는 농도 5%와 1mm의 두께를 가지는 CNT 필름과 실제 IC package를 모사한 테스트쿠폰을 사용하여 CNT 필름과 테스트쿠폰과의 거리에 따른 전자파 차폐효율 및 측정 위치에 따른 차폐효율을 측정하였다. 그 결과 근거리장에서 측정된 차폐효율은 주파수에 따라 차폐효율이 달랐다. 테스트쿠폰의 중심에서 측정된 전기장 차폐효율은 fringing effect의 영향을 받는 패턴경계보다 전기장 차폐효율이 좋은 것으로 측정되었다. 이는 근거리장에서 측정된 차폐효율은 주파수뿐만 아니라 CNT 필름과 측정 프로브의 높이, 측정 위치와 같은 측정 환경에 영향을 받는 것을 보여준다. 결론적으로 근거리장에서 제안된 방법을 사용하여 측정한 차폐효율과 ASTM D 4935-10에 의해 측정된 차폐효율은 연관성을 찾기 어렵기 때문에 전장 시스템의 거리 영역에 따라 적절한 측정 방법을 고려하여 측정해야 한다.

Performance and Variation-Immunity Benefits of Segmented-Channel MOSFETs (SegFETs) Using HfO2 or SiO2 Trench Isolation

  • Nam, Hyohyun;Park, Seulki;Shin, Changhwan
    • JSTS:Journal of Semiconductor Technology and Science
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    • 제14권4호
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    • pp.427-435
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    • 2014
  • Segmented-channel MOSFETs (SegFETs) can achieve both good performance and variation robustness through the use of $HfO_2$ (a high-k material) to create the shallow trench isolation (STI) region and the very shallow trench isolation (VSTI) region in them. SegFETs with both an HTI region and a VSTI region (i.e., the STI region is filled with $HfO_2$, and the VSTI region is filled with $SiO_2$) can meet the device specifications for high-performance (HP) applications, whereas SegFETs with both an STI region and a VHTI region (i.e., the VSTI region is filled with $HfO_2$, and the STI region is filled with $SiO_2$) are best suited to low-standby power applications. AC analysis shows that the total capacitance of the gate ($C_{gg}$) is strongly affected by the materials in the STI and VSTI regions because of the fringing electric-field effect. This implies that the highest $C_{gg}$ value can be obtained in an HTI/VHTI SegFET. Lastly, the three-dimensional TCAD simulation results with three different random variation sources [e.g., line-edge roughness (LER), random dopant fluctuation (RDF), and work-function variation (WFV)] show that there is no significant dependence on the materials used in the STI or VSTI regions, because of the predominance of the WFV.