• JSTS:Journal of Semiconductor Technology and Science
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• v.14 no.1
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• pp.100-108
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• 2014

Low noise amplifier (LNA) is an integral component of RF receiver and frequently required to operate at wide frequency bands for various wireless system applications. For wideband operation, important performance metrics such as voltage gain, return loss, noise figure and linearity have been carefully investigated and characterized for the proposed LNA. An inductive shunt feedback configuration is successfully employed in the input stage of the proposed LNA which incorporates cascaded networks with a peaking inductor in the buffer stage. Design equations for obtaining low and high impedance-matching frequencies are easily derived, leading to a relatively simple method for circuit implementation. Careful theoretical analysis explains that input impedance can be described in the form of second-order frequency response, where poles and zeros are characterized and utilized for realizing the wideband response. Linearity is significantly improved because the inductor located between the gate and the drain decreases the third-order harmonics at the output. Fabricated in $0.18{\mu}m$ CMOS process, the chip area of this wideband LNA is $0.202mm^2$, including pads. Measurement results illustrate that the input return loss shows less than -7 dB, voltage gain greater than 8 dB, and a little high noise figure around 6-8 dB over 1.5 - 13 GHz. In addition, good linearity (IIP3) of 2.5 dBm is achieved at 8 GHz and 14 mA of current is consumed from a 1.8 V supply.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.37 no.10
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• pp.33-41
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• 2000

Pyroelectric characteristics such as voltage responsivity, noise equivalent power and detectivity are modeled 3-dimensionaly considering th interaction of each parameters. Also, the circuit is designed to set up the frequency band width and the signal amplification of the pyroelectric IR sensor. The case of low frequency region shows that the voltage response increases with the independence of the sensor area as the thickness decreases. In the high frequency region, it is found that the voltage response with the load resistor of 20$G{\Omega}$ increases with the independence of the sensor thickness as the sensor area decreases. In the low frequency region, the detectivity becomes excellent at th load resistor of 20$G{\Omega}$, the sensor area larger than $4{\times}10^{-10}m^2$ and the sensor thickness thinner than $1{\times}10^{-5}m$, while, in the high frequency region, it shows high value at the sensor thickness thinner than $1{\times}10^{-5}m$ and the sensor area smaller than $2{\times}10^{-10}m^2$ with the independence of the load resistor. In the circuit design, quasi-boot-strap circuit is employed, in which a single op-amp is connected to the drain of JFFT. Desirable frequency band width, amplification rate and the remarkable drop of noise of about 56% from that of conventional circuits with double op-amps are obtained.

• ETRI Journal
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• v.42 no.4
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• pp.549-561
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• 2020

We developed a 0.1-㎛ metamorphic high electron mobility transistor and fabricated a W-band monolithic microwave integrated circuit chipset with our in-house technology to verify the performance and usability of the developed technology. The DC characteristics were a drain current density of 747 mA/mm and a maximum transconductance of 1.354 S/mm; the RF characteristics were a cutoff frequency of 210 GHz and a maximum oscillation frequency of 252 GHz. A frequency multiplier was developed to increase the frequency of the input signal. The fabricated multiplier showed high output values (more than 0 dBm) in the 94 GHz-108 GHz band and achieved excellent spurious suppression. A low-noise amplifier (LNA) with a four-stage single-ended architecture using a common-source stage was also developed. This LNA achieved a gain of 20 dB in a band between 83 GHz and 110 GHz and a noise figure lower than 3.8 dB with a frequency of 94 GHz. A W-band image-rejection mixer (IRM) with an external off-chip coupler was also designed. The IRM provided a conversion gain of 13 dB-17 dB for RF frequencies of 80 GHz-110 GHz and image-rejection ratios of 17 dB-19 dB for RF frequencies of 93 GHz-100 GHz.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.17 no.7 s.110
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• pp.659-664
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• 2006

This paper reports a high power 60 GHz push-push oscillator fabricated using $0.12{\mu}m$ metamorphic high electron-mobility transistors(mHEMTs). The devices with a $0.12{\mu}m$ gate-length exhibited good DC and RF characteristics such as a maximum drain current of 700 mA/mm, a peak gm of 660 mS/mm, an $f_T$ of 170 GHz, and an $f_{MAX}$ of more than 300 GHz. By combining two sub-oscillators having $6{\times}50{\mu}m$ periphery mHEMT, the push-push oscillator achieved a 6.3 dBm of output power at 59.5 GHz with more than - 35 dBc fundamental suppression. The phase noise of - 81.5 dBc/Hz at 1 MHz offset was measured. This is one of the highest output power obtained using mHEMT technology without buffer amplifier, and demonstrates the potential of mHEMT technology for cost effective millimeter-wave commercial applications.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.24 no.11
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• pp.1055-1063
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• 2013

Low noise amplifiers(LNAs) are an integral component of RF receivers and are frequently required to operate at wide frequency bands for various wireless systems. For wideband operation, important performance metrics such as voltage gain, return loss, noise figures and linearity have been carefully investigated and characterized for the proposed LNA. An inductive shunt feedback configuration is successfully employed in the input stage of the proposed LNA which incorporates cascaded networks with a peaking inductor in the buffer stage. Design equations for obtaining low and high input matching frequencies are easily derived, leading to a relatively simple method for circuit implementation. Careful theoretical analysis explains that poles and zeros are characterized and utilized for realizing the wideband response. Linearity is significantly improved because the inductor between gate and drain decreases the third-order harmonics at the output. Fabricated in $0.18{\mu}m$ CMOS process, the chip area of this LNA is $0.202mm^2$, including pads. Measurement results illustrate that input return loss shows less than -7 dB, voltage gain greater than 8 dB, and a little high noise figure around 7~8 dB over 1.5~13 GHz. In addition, good linearity(IIP3) of 2.5 dBm is achieved at 8 GHz and 14 mA of current is consumed from a 1.8 V supply.