• Title/Summary/Keyword: digital signal process

검색결과 525건 처리시간 0.027초

High Noise Density Median Filter Method for Denoising Cancer Images Using Image Processing Techniques

  • Priyadharsini.M, Suriya;Sathiaseelan, J.G.R
    • International Journal of Computer Science & Network Security
    • /
    • 제22권11호
    • /
    • pp.308-318
    • /
    • 2022
  • Noise is a serious issue. While sending images via electronic communication, Impulse noise, which is created by unsteady voltage, is one of the most common noises in digital communication. During the acquisition process, pictures were collected. It is possible to obtain accurate diagnosis images by removing these noises without affecting the edges and tiny features. The New Average High Noise Density Median Filter. (HNDMF) was proposed in this paper, and it operates in two steps for each pixel. Filter can decide whether the test pixels is degraded by SPN. In the first stage, a detector identifies corrupted pixels, in the second stage, an algorithm replaced by noise free processed pixel, the New average suggested Filter produced for this window. The paper examines the performance of Gaussian Filter (GF), Adaptive Median Filter (AMF), and PHDNF. In this paper the comparison of known image denoising is discussed and a new decision based weighted median filter used to remove impulse noise. Using Mean Square Error (MSE), Peak Signal to Noise Ratio (PSNR), and Structure Similarity Index Method (SSIM) metrics, the paper examines the performance of Gaussian Filter (GF), Adaptive Median Filter (AMF), and PHDNF. A detailed simulation process is performed to ensure the betterment of the presented model on the Mini-MIAS dataset. The obtained experimental values stated that the HNDMF model has reached to a better performance with the maximum picture quality. images affected by various amounts of pretend salt and paper noise, as well as speckle noise, are calculated and provided as experimental results. According to quality metrics, the HNDMF Method produces a superior result than the existing filter method. Accurately detect and replace salt and pepper noise pixel values with mean and median value in images. The proposed method is to improve the median filter with a significant change.

Estimation of viscosity of by comparing the simulated pressure profile from CAE analysis with the Long Fiber Thermoplastic(LFT) measuring cavity pressure (Long Fiber Thermoplastic(LFT) 사출성형 공정에서 캐비티 내 압력 측정 및 CAE해석을 활용한 점도 추정)

  • Lim, Seung-Hyun;Jeon, Kang-Il;Son, Young-Gon;Kim, Dong-Hak
    • Journal of the Korea Academia-Industrial cooperation Society
    • /
    • 제12권4호
    • /
    • pp.1982-1987
    • /
    • 2011
  • In this study, we proposed a new method that can estimate viscosity curves of unknown samples or high viscous resins like LFT(Long Fiber Thermoplastics). First, we built the system that could detect the pressure of melt during filling the cavity in a mold. It consists of both pressure sensors which are installed in a mold and the Kit which can convert analog signal to digital signal. The kit measures the melt pressure in mold cavity. We could also simulate the cavity pressure during filling process with commercialized CAE softwares(ex, Moldflow). If the viscosity data in CAE Database were correct, the simulated pressure profile coincided with the measured one. According to our proposed algorithm, we obtained correct viscosity data by iterating the process of comparing the simulated profile with the measured one until both coincided each other. In order to verify this algorithm, we selected well-defined PP resin and concluded that the experimental profile comply with the CAE profile. We could also estimate the optimized viscosity curves for PP-LFT by applying our method.

GIS Information Generation for Electric Mobility Aids Based on Object Recognition Model (객체 인식 모델 기반 전동 이동 보조기용 GIS 정보 생성)

  • Je-Seung Woo;Sun-Gi Hong;Dong-Seok Park;Jun-Mo Park
    • Journal of the Institute of Convergence Signal Processing
    • /
    • 제23권4호
    • /
    • pp.200-208
    • /
    • 2022
  • In this study, an automatic information collection system and geographic information construction algorithm for the transportation disadvantaged using electric mobility aids are implemented using an object recognition model. Recognizes objects that the disabled person encounters while moving, and acquires coordinate information. It provides an improved route selection map compared to the existing geographic information for the disabled. Data collection consists of a total of four layers including the HW layer. It collects image information and location information, transmits them to the server, recognizes, and extracts data necessary for geographic information generation through the process of classification. A driving experiment is conducted in an actual barrier-free zone, and during this process, it is confirmed how efficiently the algorithm for collecting actual data and generating geographic information is generated.The geographic information processing performance was confirmed to be 70.92 EA/s in the first round, 70.69 EA/s in the second round, and 70.98 EA/s in the third round, with an average of 70.86 EA/s in three experiments, and it took about 4 seconds to be reflected in the actual geographic information. From the experimental results, it was confirmed that the walking weak using electric mobility aids can drive safely using new geographic information provided faster than now.

Design of a Fully Integrated Low Power CMOS RF Tuner Chip for Band-III T-DMB/DAB Mobile TV Applications (Band-III T-DMB/DAB 모바일 TV용 저전력 CMOS RF 튜너 칩 설계)

  • Kim, Seong-Do;Oh, Seung-Hyeub
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
    • /
    • 제21권4호
    • /
    • pp.443-451
    • /
    • 2010
  • This paper describes a fully integrated CMOS low-IF mobile-TV RF tuner for Band-III T-DMB/DAB applications. All functional blocks such as low noise amplifier, mixers, variable gain amplifiers, channel filter, phase locked loop, voltage controlled oscillator and PLL loop filter are integrated. The gain of LNA can be controlled from -10 dB to +15 dB with 4-step resolutions. This provides a high signal-to-noise ratio and high linearity performance at a certain power level of RF input because LNA has a small gain variance. For further improving the linearity and noise performance we have proposed the RF VGA exploiting Schmoock's technique and the mixer with current bleeding, which injects directly the charges to the transconductance stage. The chip is fabricated in a 0.18 um mixed signal CMOS process. The measured gain range of the receiver is -25~+88 dB, the overall noise figure(NF) is 4.02~5.13 dB over the whole T-DMB band of 174~240 MHz, and the measured IIP3 is +2.3 dBm at low gain mode. The tuner rejects the image signal over maximum 63.4 dB. The power consumption is 54 mW at 1.8 V supply voltage. The chip area is $3.0{\times}2.5mm^2$.

Digitalization of the Nuclear Steam Generator Level Control System (증기발생기 수위조절 시스템의 디지탈화)

  • Lee, Yoon-Joon;Lee, Un-Chul
    • Nuclear Engineering and Technology
    • /
    • 제25권1호
    • /
    • pp.125-135
    • /
    • 1993
  • The safe and efficient operation of nuclear plants is recognized to be accomplished through the application of plant automation using digital technology, which is one of main targets of the next generation nuclear plants. For plant level automation, it is first required that each major subsystem be digitalized, and the steam generator water level control system is discussed in this study. The transfer functions between inputs and the level are derived by employing the thermal hydraulic model of the steam generator and are applied to the analysis of the current three-element control system. Since the control scheme in this study includes the steam generator itself as a process plant, the system order is high and the numerical instability arises in digitalizing. Together with this, the unreliability of the feedwater feedback signal at low power level leads to the proposal of a two-element control system with a proper digital controller. The digital PI controller developed for this system has the initial power adaptive gain and integration time constant. And it makes the overall system response satisfy the stability and other necessary control specifications simultaneously. Since the two-element control system using this controller depends on the initial power only, it is simple to define and it shows a similar level response behavior to that of its corresponding analog system.

  • PDF

Design of a Low-Power 8-bit 1-MS/s CMOS Asynchronous SAR ADC for Sensor Node Applications (센서 노드 응용을 위한 저전력 8비트 1MS/s CMOS 비동기 축차근사형 ADC 설계)

  • Jihun Son;Minseok Kim;Jimin Cheon
    • The Journal of Korea Institute of Information, Electronics, and Communication Technology
    • /
    • 제16권6호
    • /
    • pp.454-464
    • /
    • 2023
  • This paper proposes a low-power 8-bit asynchronous SAR ADC with a sampling rate of 1 MS/s for sensor node applications. The ADC uses bootstrapped switches to improve linearity and applies a VCM-based CDAC switching technique to reduce the power consumption and area of the DAC. Conventional synchronous SAR ADCs that operate in synchronization with an external clock suffer from high power consumption due to the use of a clock faster than the sampling rate, which can be overcome by using an asynchronous SAR ADC structure that handles internal comparisons in an asynchronous manner. In addition, the SAR logic is designed using dynamic logic circuits to reduce the large digital power consumption that occurs in low resolution ADC designs. The proposed ADC was simulated in a 180-nm CMOS process, and at a 1.8 V supply voltage and a sampling rate of 1 MS/s, it consumed 46.06 𝜇W of power, achieved an SNDR of 49.76 dB and an ENOB of 7.9738 bits, and obtained a FoM of 183.2 fJ/conv-step. The simulated DNL and INL are +0.186/-0.157 LSB and +0.111/-0.169 LSB.

CMOS Analog-Front End for CCD Image Sensors (CCD 영상센서를 위한 CMOS 아날로그 프론트 엔드)

  • Kim, Dae-Jeong;Nam, Jeong-Kwon
    • Journal of IKEEE
    • /
    • 제13권1호
    • /
    • pp.41-48
    • /
    • 2009
  • This paper describes an implementation of the analog front end (AFE) incorporated with the image signal processing (ISP) unit in the SoC, dominating the performance of the CCD image sensor system. New schemes are exploited in the high-frequency sampling to reduce the sampling uncertainty apparently as the frequency increases, in the structure for the wide-range variable gain amplifier (VGA) capable of $0{\sim}36\;dB$ exponential gain control to meet the needed bandwidth and accuracy by adopting a new parasitic insensitive capacitor array. Moreover, the double cancellation of the black-level noise was efficiently achieved both in the analog and the digital domain. The proposed topology fabricated in a $0.35-{\mu}m$ CMOS process was proved in a full CCD camera system of 10-bit accuracy, dissipating 80 mA at 15 MHz with a 3.3 V supply voltage.

  • PDF

Study on LED Low-cost Control Technology Associated with User Information Situation (사용자 정보상황 연계형 LED 절감제어기술에 관한 연구)

  • Jang, Tae-Su;Hong, Geun-Bin;Kang, Eun-Young;Kim, Yong-Kab;Kim, Byun-Gon
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
    • /
    • 한국정보통신학회 2012년도 춘계학술대회
    • /
    • pp.743-744
    • /
    • 2012
  • LED digital control convergence technology is receiving attention. It enables to analyze lighting and living environments by recognizing user information and situations through a signal process system composed of a multi-functional composite sensor's module. LED lighting is higly efficient, long-lived, environmentally, and is possible to converge with communication, and receiving as a next-generation general lighting that will replace a florescent light including the light bulb. The proposed system is an intelligent LED control system that uses solar light. This study is about a lighting control technology associated with user-estimated information/situation and related low-cost technology. Also, this study aims to embody emotional lighting by appropriately lighting 10% of the discharge current with supplementary colored LED according to the surrounding environment.

  • PDF

Design of QPSK Ultrasonic Transceiver For Underwater Communication (수중 통신을 위한 QPSK 초음파 송수신기의 설계)

  • Cho Nai-Hyun;Kim Duk-Yung;Kim Yong-Deuk;Chung Yun-Mo
    • Journal of the Institute of Electronics Engineers of Korea SC
    • /
    • 제43권3호
    • /
    • pp.51-59
    • /
    • 2006
  • In this paper, we propose an excellent ultrasonic transceiver system based on a QPSK modulation technique for underwater communication. The transmitter sends a still image at the level of 187dB re $1{\mu}Pa/V@1m$ through a power amplifier by driving an ultrasonic sensor. The receiver performs digital conversion at the 100kHz sampling frequency, demodulation and decoding process for the image sent from the transmitter through the underwater communication. We have shown that the processed image at the receiver is almost the same as the orignal one. The maximum detection distance of the system proposed in this paper is approximately 1.17km. To cope with the difficulties of transmission loss, this paper proposes, implements and analyzes important parameters of sensors and circuits used in the system. Most of the underwater communication has focused on the transmission of audio signal, but this paper suggests an efficient underwater communication system for still image transmission.

Design and Implementation of a Low-Complexity Real-Time Barrel Distortion Corrector for Wide-Angle Cameras (광각 카메라를 위한 저 복잡도 실시간 베럴 왜곡 보정 프로세서의 설계 및 구현)

  • Jeong, Hui-Seong;Kim, Won-Tae;Lee, Gwang-Ho;Kim, Tae-Hwan
    • Journal of the Institute of Electronics and Information Engineers
    • /
    • 제50권6호
    • /
    • pp.131-137
    • /
    • 2013
  • The barrel distortion makes serious problems in a wide-angle camera employing a lens of a short focal length. This paper presents a low-complexity hardware architecture for a real-time barrel distortion corrector and its implementation. In the proposed barrel distortion corrector, the conventional algorithm is modified so that the correction is performed incrementally, which results in the reduction of the number of required hardware modules for the distortion correction. The proposed barrel distortion corrector has a pipelined architecture so as to achieve a high-throughput correction. The correction rate is 74.86 frames per sec at the operating frequency of 314MHz in a $0.11{\mu}m$ CMOS process, where the frame size is $2048{\times}2048$. The proposed barrel distortion corrector is implemented with 14.3K logic gates.