• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.18 no.1
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• pp.6-11
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• 2005

In this paper, two types of vertical SIT(Static Induction Transistor) structures are proposed to improve their electrical characteristics including the blocking voltage. Besides, the two dimensional numerical simulations were carried out using ISE-TCAD to verify the validity of the device and examine the electrical characteristics. First, a trench gate region oxide power SIT device is proposed to improve forward blocking characteristics. Second, a trench gate-source region power SIT device is proposed to obtain more higher forward blocking voltage and forward blocking characteristics at the same size. The two proposed devices have superior electrical characteristics when compared to conventional device. In the proposed trench gate oxide power SIT, the forward blocking voltage is considerably improved by using the vertical trench oxide and the forward blocking voltage is 1.5 times better than that of the conventional vertical power SIT. In the proposed trench gate-source oxide power SIT, it has considerable improvement in forward blocking characteristics which shows 1500V forward blocking voltage at -10V of the gate voltage. Consequently, the proposed trench oxide power SIT has the superior stability and electrical characteristics than the conventional power SIT.

• Korean Journal of Optics and Photonics
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• v.19 no.1
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• pp.25-30
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• 2008

In this paper, a novel architecture for device miniaturization of multimode interference-based (MMI) couplers is proposed. The coupling length of $N{\times}N$ MMI couplers scales as the square of the MMI region width so that the use of these structures with large-N ports can require large chip size. To solve the design problem, the butterfly grating-assisted MMI couplers, that have smaller device dimensions than conventional MMI couplers, are discussed and evaluated. Numerical simulations and novel design rules for such structures derived through theoretical analysis are presented.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.38 no.1
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• pp.1-12
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• 2001

Based on mixed-mode transient analyses utilizing a 2-dimensional device simulator, we have suggested the methodology to analyze the HBM ESD phenomena in CMOS chips utilizing NMOS transistors for ESD protection, and have analyzes the HBM discharge mechanisms in detail. Also the second breakdown characteristics in the protection device have been successfully simulated based on mixed-mode simulations, to explain the discharge mechanisms leading to device failure. To analyze the effects of the device structure changes on the discharge characteristics, we have compared the results of DC analyses and mixed-mode transient analyses, and have discussed about more robust designs of NMOS transistor structures against HBM ESD based on the analyses.

• Transactions on Electrical and Electronic Materials
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• v.17 no.1
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• pp.1-6
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• 2016

Ensuring the secure operation of power systems has become an important and critical matter during the present time, along with the development of large, complex and load-increasing systems. Security constraints such as the thermal limits of transmission lines and bus-voltage limits must be satisfied under all of a system’s operational conditions. An alternative solution to improve the security of a power system is the employment of Flexible Alternating-Current Transmission Systems (FACTS). FACTS devices can reduce the flows of heavily loaded lines, maintain the bus voltages at desired levels, and improve the stability of a power network. The Unified Power Flow Controller (UPFC) is a versatile FACTS device that can independently or simultaneously control the active power, the reactive power and the bus voltage; however, to achieve such functionality, it is very important to determine the optimal location of the UPFC device, with the appropriate parameter setting, in the power system. In this paper, a genetic algorithm (GA) method is applied to determine the optimal location of the UPFC device in a network for the enhancement of the power-system loadability and the minimization of the active power loss in the transmission line. To verify our approach, simulations were performed on the IEEE 14 Bus, 30 Bus, and 57 Bus test systems. The proposed work was implemented in the MATLAB platform.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2006.06a
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• pp.196-197
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• 2006

In this paper, two types of vertical SIT(Static Induction Transistor) structures are proposed to improve their electrical characteristics including the blocking voltage. Besides, the two dimensional numerical simulations were carried out using ISE-TCAD to verify the validity of the device and examine the electrical characteristics. First, a trench gate region oxide power SIT device is proposed to improve forward blocking characteristics. Second, a trench gate-source region power SIT device is proposed to obtain more higher forward blocking voltage and forward blocking characteristics at the same size. The two proposed devices have superior electrical characteristics when compared to conventional device. In the proposed trench gate oxide power SIT, the forward blocking voltage is considerably improved by using the vertical trench oxide and the forward blocking voltage is 1.5 times better than that of the conventional vertical power SIT. In the proposed trench gate-source oxide power SIT, it has considerable improvement in forward blocking characteristics which shows 1500V forward blocking voltage at -10V of the gate voltage. Consequently, the proposed trench oxide power SIT has the superior stability and electrical characteristics than the conventional power SIT.

• KSII Transactions on Internet and Information Systems (TIIS)
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• v.14 no.11
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• pp.4372-4394
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• 2020

The distribution of popular videos incurs a large amount of traffic at the base stations (BS) of networks. Device-to-multi-device (D2MD) communication has emerged an efficient radio access technology for offloading BS traffic in recent years. However, traditional studies have focused on synchronous user requests whereas asynchronous user requests are more common. Hence, offloading BS traffic in case of asynchronous user requests while considering their time-varying characteristics and the quality of experience (QoE) of video request users (VRUs) is a pressing problem. This paper uses social stability (SS) and video loading duration (VLD)-tolerant property to group VRUs and seed users (SUs) to offload BS traffic. We define the average amount of data transmission (AADT) to measure the network's capacity for offloading BS traffic. Based on this, we formulate a time-varying bipartite graph matching optimization problem. We decouple the problem into two subproblems which can be solved separately in terms of time and space. Then, we propose the socially aware D2MD user selection (SA-D2MD-S) algorithm based on finite horizon optimal stopping theory, and propose the SA-D2MD user matching (SA-D2MD-M) algorithm to solve the two subproblems. The results of simulations show that our algorithms outperform prevalent algorithms.

• KSII Transactions on Internet and Information Systems (TIIS)
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• v.17 no.10
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• pp.2732-2749
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• 2023

Device-to-Device (D2D) communication has received increasing attention and been studied extensively thanks to its advantages in improving spectral efficiency and energy efficiency of cellular networks. This paper proposes a novel relay selection algorithm for multi-hop full-duplex D2D communications underlaying cellular networks. By selecting the relay of each hop in a reverse manner, the proposed algorithm reduces the heavy signaling overhead that traditional relay selection algorithms introduce. In addition, the social domain information of mobile terminals is taken into consideration and its influence on the performance of D2D communications studied, which is found significant enough not to be overlooked. Moreover, simulations show that the proposed algorithm, in absence of social relationship information, improves data throughput by around 70% and 7% and energy efficiency by 64% and 6%, compared with two benchmark algorithms, when D2D distance is 260 meters. In a more practical implementation considering social relationship information, although the proposed algorithm naturally achieves less throughput, it substantially increases the energy efficiency than the benchmarks.

• Smart Structures and Systems
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• v.26 no.5
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• pp.605-617
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• 2020

In this study, the experimental tests for the direct tensile strength measurement of Ultra-High Performance Concrete (UHPC) were numerically modeled by using the discrete element method (circle type element) and Finite Element Method (FEM). The experimental tests used for the laboratory tensile strength measurement is the Compressive-to-Tensile Load Conversion (CTLC) device. In this paper, the failure process including the cracks initiation, propagation and coalescence studied and then the direct tensile strength of the UHPC specimens measured by the novel apparatus i.e., CTLC device. For this purpose, the UHPC member (each containing a central hole) prepared, and situated in the CTLC device which in turn placed in the universal testing machine. The direct tensile strength of the member is measured due to the direct tensile stress which is applied to this specimen by the CTLC device. This novel device transferring the applied compressive load to that of the tensile during the testing process. The UHPC beam specimen of size 150 × 60 × 190 mm and internal hole of 75 × 60 mm was used in this study. The rate of the applied compressive load to CTLC device through the universal testing machine was 0.02 MPa/s. The direct tensile strength of UHPC was found using a new formula based on the present analyses. The numerical simulation given in this study gives the tensile strength and failure behavior of the UHPC very close to those obtained experimentally by the CTLC device implemented in the universal testing machine. The percent variation between experimental results and numerical results was found as nearly 2%. PFC2D simulations of the direct tensile strength measuring specimen and ABAQUS simulation of the tested CTLC specimens both demonstrate the validity and capability of the proposed testing procedure for the direct tensile strength measurement of UHPC specimens.

• Journal of Biosystems Engineering
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• v.43 no.3
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• pp.202-210
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• 2018

Purpose: Due to the growing demand for vegetables all year round, the use of vegetable transplanters has become widespread in agricultural production. However, the type of planting device used for the transplanter affects its overall efficiency. Problems such as inaccurate planting angles and inefficiently wide transplanting hole diameters of the planting device has limited the efficient use of some vegetable transplanters. Our goal in this study was to improve the efficiency of the transplanter by analyzing and modifying the linkages of the planting device of a vegetable transplanter. Methods: Because of its widespread usage in Korea, a linkage-type planting device was used for the experiment, which was divided into three parts. In the first part, the physical trajectory of the tranplanter was extracted using a CCD (charge-coupled device) camera and analyzed. In the second part, a simulated trajectory was developed using Recurdyn 3D software. The simulated and actual trajectories were then compared and analyzed. In the third part, based on the results of the comparison, improvements were made on the linkages of the transplanter and a demonstrative exercise was conducted. Finally, in experiment B, the performance was evaluated through an exercise using both the existing and improved planting devices. Results: The results demonstrated that the average planting angle was improved by 4.96 mm, the soil intrusion diameter was improved by 11.30 mm, and the planting depth was improved by 0.68 mm. Conclusion: It was concluded that the efficiency of a vegetable transplanter can be improved by modifying the linkages through simulations and field demonstrations.

• Solar Energy
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• v.19 no.4
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• pp.71-80
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• 1999

For developing a new measuring device which enables the thermal resistance at comers of the building envelope in addition to the plate wall measuring device, computer simulations were performed to clarify the problems produced during previous tests. For the optimum design to reduce the temperature deviation in measuring device, the specifications of the measuring devices are to be as follows : Dimension of the device is $500{\times}500{\times}100mm$ in size, heating plate is seperated to some degree from the inner surface of the measuring device, lower temperature of heating plate is as effective as possible, fans should be located at the upper part in the measuring device and face to downward.