• Journal of Power System Engineering
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• v.3 no.2
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• pp.64-69
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• 1999

The paper shows a result for development of BLDC motor drive by using a resolver as position detection sensor. The developed drive use a method detecting rotor position based on HSI interrupt function of microprocessor without a specialized counting circuit. The algorithm generating three-phase PWM wave to change switching voltage and current is realized based on single chip microprocessor. The PWM generating part and position counting circuit are realized by software technique without usage of conventional analogue circuit or object-oriented chips. So the drive system become compact. The effectiveness of the developed drive is verified by experimented results of speed response for step reference input.

• Proceedings of the IEEK Conference
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• 2000.11c
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• pp.149-152
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• 2000

We propose simple analog MOS circuits producing the one-dimensional compact motion-sensing circuits. In the proposed circuit, the optical flow is computed by a number of local motion sensors which are based on biological motion detectors. Mimicking the structure of biological motion detectors made the circuit structure quite simple, compared with conventional velocity sensing circuits. Extensive simulation results by a simulation program of integrated circuit emphasis (SPICE) indicated that the proposed circuits could compute local velocities of a moving light spot and showed direction selectivity for the moving spot

• Proceedings of the KSR Conference
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• 2005.05a
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• pp.867-872
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• 2005

This paper describes the measurement and location method of partial discharges in high voltage CV cables. Coupling capacitors were used to detect partial discharge signal. Impedance characteristic of the coupling circuit and an amplifier with a high Common Mode Rejection Ratio(CMRR) were studied to improve sensitivity of the circuit. From the calibration experiment, the sensitivity of the partial discharge detection circuit was about 100pC. Also, we confirmed that the location of partial discharges in cables can be estimated by calculation of time difference between the first pulse and the second one reflected from the other end of the cable.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2003.05b
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• pp.154-158
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• 2003

In this study, to measure the density of compaction, it is designed to use the 5 gamma-ray detectors. The developed instrument consists of measuring circuits for gamma-rays and thermal neutrons, a high voltage supply unit, stable circuit unit, count circuit unit and a microprocessor. To read count pulse from gamma-ray detectors are very accurate and it can be count to data calibration excluded count of ripple.

• Journal of the Korean Institute of Telematics and Electronics C
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• v.34C no.1
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• pp.1-11
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• 1997

A BiCMOS circuit consists of the CMOS part which performs the logic function, and the bipolar part which drives output load. In BiCMOS circuits, transistor stuck-open faults exhibit delay faults in addition to sequential beavior. Also, stuck-on faults enhanced IDDQ (quiscent power supply current) at steady state. In this paper, a method is proposed which efficiently generates test patterns to detect stuck-open faults and stuck-on faults in BiCMOS circuits. The proposed method divides the BiCMOS circuit into pull-up part and pull-down part, and generates test patterns detect faults occured in each part by structural property of the BiCMOS circuit.

• Journal of the Korean Institute of Telematics and Electronics B
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• v.32B no.11
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• pp.1434-1444
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• 1995

Current test has recently been known to be a promising testing method in CMOS VLSI because conventional voltage test can not make sure of the complete detection of bridging, gate-oxide shorts, stuck-open faults and etc. This paper presents a new BIC(built-in current sensor) for the internal current test in CMOS logic circuit. A single phase clock is used in the BIC to reduce the control circuitry of it and to perform a self- testing for a faulty current. The BIC is designed to detect the faulty current at the end of the clock period, so that it can test the CUT(circuit under test) with much longer critical propagation delay time and larger area than conventional BICs. The circuit is composed of 18 devices and verified by using the SPICE simulator.

• Proceedings of the KIEE Conference
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• 2007.07a
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• pp.675-676
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• 2007

This Paper presents circuit improvement of 345kV Bus bar protection panel by using VDD (Voltage disturbance detection) relay with distinctive ability between human error in the field test and real facility faults. Therefore, We expect that this improvement of circuit helps decrease of blackout coming from human error. In order to guarantee electric power system reliability, consistent study of human error prevention in the event of field test is necessarily required

• International Journal of Control, Automation, and Systems
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• v.6 no.5
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• pp.767-775
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• 2008

Methods used for exploring marine resources and spaces include positioning a probe under water and then recalling it after a specified time. Hydro-acoustic Releasers are commonly used for positioning and retrieving of such exploration equipment. The most important factor in this kind of system is the reliability for recalling the instruments. The frequently used ultrasonic signal detection method can detect ultrasonic signals using a fixed comparator, but because of increased rates of errors due to outside interferences, information is repetitively acquired. This study presents an effective ultrasonic signal detection algorithm using the characteristics of a resonance and adaptive comparator Combined with the FSK+ASK modulator. As a result, approximately 8.8% of ultrasonic wave communication errors caused by background noise and transmission losses were reduced for effectively detecting ultrasonic waves. Furthermore, the resonance circuit's quality factor was enhanced (Q = 120 to 160). As such, the bias voltage of the transistor (Vb= 3.3 to 6.8V) was increased thereby enhancing the frequency's selectivity.

• Journal of IKEEE
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• v.8 no.2 s.15
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• pp.161-165
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• 2004

In this paper, an 8bit wave pipelined adder using the static CMOS plus Edge-Sensing Completion Detection Logic is presented. The clockless wave-pipelining algorithm was implemented in the circuit design. The Edge-Sensing Completion Detection (ESCD) in the algorithm is consisted of edge-sensing circuits and latches. Using the algorithm, skewed data at the output of 8bit adder could be aligned. Simulation results show that the adder operates at 1GHz in $0.35{\mu}m$ CMOS technology with 3.3V supply voltage.

• Journal of Power Electronics
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• v.18 no.5
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• pp.1513-1522
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• 2018

This paper proposes a new islanding detection method for inverter-based distributed generators by continuously injecting a negligible amount of 2nd order harmonic current. The proposed method adopts a proportional resonant (PR) controller for the output current control of the inverter, and a PR filter to extract the 2nd order harmonic voltage at the point of common coupling (PCC). The islanding state can be detected by measuring the magnitude ratio of the 2nd order harmonic voltage to the fundamental voltage at the PCC by injecting a 2nd order harmonic current with a 0.8% magnitude. The proposed method provides accurate and fast detection under grid voltage unbalance and load unbalance. The operation of the proposed method has been verified through simulations and experiments with a 5kW hardware set-up, considering the islanding test circuit suggested in UL1741.