• Title/Summary/Keyword: delay testing

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Logic Circuit Fault Models Detectable by Neural Network Diagnosis

  • Tatsumi, Hisayuki;Murai, Yasuyuki;Tsuji, Hiroyuki;Tokumasu, Shinji;Miyakawa, Masahiro
    • Proceedings of the Korean Institute of Intelligent Systems Conference
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    • 2003.09a
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    • pp.154-157
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    • 2003
  • In order for testing faults of combinatorial logic circuit, the authors have developed a new diagnosis method: "Neural Network (NN) fault diagnosis", based on fm error back propagation functions. This method has proved the capability to test gate faults of wider range including so called SSA (single stuck-at) faults, without assuming neither any set of test data nor diagnosis dictionaries. In this paper, it is further shown that what kind of fault models can be detected in the NN fault diagnosis, and the simply modified one can extend to test delay faults, e.g. logic hazard as long as the delays are confined to those due to gates, not to signal lines.

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Development of Inspection System for Aluminum Castings with X-Ray TDI Camera (X-Ray TDI Camera를 이용한 알루미늄 주강품 검사장치 개발)

  • Nam, Mun-Ho;Park, Seong-Wook;Kim, Chang-Ho;Chung, Chan-Soo
    • Proceedings of the KIEE Conference
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    • 2011.07a
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    • pp.1734-1735
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    • 2011
  • In case of inspection on aluminum castings, traditional RT (Radiographic Testing) method have been utilized for its advantages in interpretation, cost and perpetual storage. But it has disadvantages like time consumption in film processing, low efficiency in storage and environmental pollution. In this thesis, a DRS (Digital Radiography System) utilizing X-Ray TDI Camera (Time Delay and Integration Camera) is developed. Inspections on aluminum castings are performed using the developed Digital Radiography System, DRS and reviewed if newly developed system can substitute for the traditional method.

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On the study of the measurement of blasting Vibration and Sound influenced to housing structure at Wire-Tunnelling (부산 통신구굴진 발파작업으로 인한 지상주택 구조물에 미치는 진동폭음영향계측조사보고)

  • Huh Ginn
    • Explosives and Blasting
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    • v.8 no.2
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    • pp.3-17
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    • 1990
  • The Caustious blasting have often increased Complaints of ground Vibration and Sound when the Wire-Tunnel Constructed in Pusan. In order to prevent the influence to housing structure, it was necessary to predict blasting-Induced Vibration and Sound. The Suveyer determined the Burden and spacing of Drill holes, minimum delay charges within a allowable Vibration and Sound Level. Tunnel drilling and Ignition patterns are made as follows; No. 1 Tunel (Stable rock, hard rock) No.2 Tunnel (Instable plastic rock; wethered rock) and other Tunnels (Instable rock). The result of 1st testing blasting of No. 1 Tunnel was recorded Under allowable Vibration Level but sound was over 75 Db of allowable value. So Tunnel drilling pattern was amended with 52 Non-charg holes to reduce the blast-sound. The other pattern had no need to amend.

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Development of superconducting current limiting device used high-$T_{c}$ superconductor (고온초전도체를 이용한 전류제한장치의 개발)

  • 최명호;강형곤;유현수;박성진;한병성
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 1993.11a
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    • pp.35-38
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    • 1993
  • SCLD(supercondocting current 1imiting device) with YBaCuO superconductor was fabricated by the sol-gel and the doctor-blade method. Critical current density ($J_{c}$) and critical current ($I_{c}$) of the SCLD are 100.27 A/$cm^2$and 1A at 77K and the electrodes contact with SCLD by silver paste. The SCL was connected with test circuit in series. When apple iud current exceed critical current value of the SCLD in testing circuit, the SCLD ristricts the over current by generating resistance itself without delay. Resistance of SCLD increase lineary 0 to 1.6$\Omega$ in propotion to applied current above the critical current $I_{c}$.

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Fault analysis and testable desing for BiCMOS circuits (BiCMOS회로의 고장 분석과 테스트 용이화 설계)

  • 서경호;이재민
    • Journal of the Korean Institute of Telematics and Electronics A
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    • v.31A no.10
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    • pp.173-184
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    • 1994
  • BiCMOS circuits mixed with CMOS and bipolar technologies show peculiar fault characteristics that are different from those of other technoloties. It has been reported that because most of short faults in BiCMOS circuits cause logically intermediate level at outputs, current monitoring method is required to detect these faluts. However current monitoring requires additional hardware capabilities in the testing equipment and evaluation of test responses can be more difficult. In this paper, we analyze the characteristics of faults in BiCMOS circuit together with their test methods and propose a new design technique for testability to detect the faults by logic monitoring. An effective method to detect the transition delay faults induced by performance degradation by the open or short fault of bipolar transistors in BiCMOS circuits is presented. The proposed design-for-testability methods for BiCMOS circuits are confirmed by the SPICE simulation.

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A Development of Missile System Test Equipment for Ku-Band Radar Altimeter (Ku대역 전파고도계 체계점검장비 개발)

  • Kim, Taehoon;Jeong, Jinseob
    • Journal of the Korea Institute of Military Science and Technology
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    • v.18 no.6
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    • pp.808-815
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    • 2015
  • For performance improving of C-band radar altimeter used in a missile system, Ku-band radar altimeter is developed. To utilize the time delay devices which are used in testing C-band radar altimeter, we proposed C-band and Ku-band frequency conversion method and implemented it as a part of missile system test equipment. In this paper we present design contents, development results and test application results of radar altimeter test equipments.

Single-Phase Active Power Filter based on Digital Controller (디지털제어기를 기반으로 하는 단상 능동전력필터)

  • Bae, Byung-Yeol;Lee, Ji-Heon;Lee, Hye-Yeon;Ju, Young-Ah;Han, Byung-Moon;Park, Byung-Ju;Yoon, Dong-Chul
    • The Transactions of The Korean Institute of Electrical Engineers
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    • v.57 no.5
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    • pp.789-796
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    • 2008
  • This paper describes a single-phase active power filter based on a newly developed digital controller. The developed controller utilizes FFT(Fast Fourier Transform) algorithm to extract the reference signal from the load current, considering the phase-angle delay of each order of harmonics. Optimized technique was applied for whole control algorithm to implement the real-time operation of developed controller. The performance of developed controller for a single-phase active power filter was verified through computer simulations with PSCAD/EMTDC. The feasibility of hardware implementation was confirmed by building and testing a prototype. The developed digital controller for a single-phase active power filter can compensate the harmonic current generated by the power supply for digital equipment.

The Optimization of the Organic Passivation Process in the TFT-LCD Panel for LCD Televisions

  • Lee, Yeong-Beom;Jun, Sahng-Ik
    • Journal of Information Display
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    • v.10 no.2
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    • pp.54-61
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    • 2009
  • The results of the optimization of the organic passivation process for fabricating thin-film transistors (TFTs) with a high aperture ratio on a seventh-generation glass (2200${\times}$1870 mm) substrate for LCD-TV panels are reported herein. The optimization of the organic passivation process has been verified by checking various factors, including the material properties (e.g., thickness, stain, etching, thermal reflow) and the effects on the TFT operation (e.g., gate/data line delay and display-driving properties). The two main factors influencing the organic passivation process are the optimization of the final thickness of the organic passivation layer, and the gate electrode. In conclusion, the minimum possible final thickness was found to be $2.42{\um}m$ via simulation and pilot testing, using the full-factorial design. The optimization of the organic passivation layer was accomplished by improving its brightness by over 10 cd/$m^2$ (ca. 2% luminance) compared to that of the conventional organic passivation process. The results of this research also help reduce the reddish stain on display panels.

A Programmable-Dynamometer Control For Propulsin system combined Testing (추진장치 조합시험을 위한 프로그램어블 다이나모메터 제어)

  • Kim, Gil-Dong;Lee, Han-Min;Oh, Seh-Chan;Kang, Seung-Wook;Lee, Hun-Gu
    • Proceedings of the KIEE Conference
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    • 2005.10a
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    • pp.180-183
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    • 2005
  • A programmable dynamometer is the proposed system improved the problem of the torque measuring delay with torque transducer, and the load torque is estimated by the minimal order state observer based on the torque component of the vector control induction moter. Therefore, the torque controller is not affected by a load torque disturbance. To verify a superiority of the proposed control algorithm, the analysis for a root locus of a conventional control method and the proposed one, and simulation and experiment is performed. Therefore we hope to be extended in industrial application.

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Wind Tunnel Test to Enhance Aerodynamic Characteristics of Forward Swept Wing Airplane (전진익형 항공기 공력특성 증진을 위한 풍동시험)

  • Chung, Jin-Deog;Lee, Jang-Yeon;Sung, Bong-Zoo;Lee, Jong-Won
    • Transactions of the Korean Society of Mechanical Engineers B
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    • v.28 no.7
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    • pp.800-808
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    • 2004
  • Wind tunnel test of an airplane model with forward swept wing was done in KARI LSWT to evaluate and measure the aerodynamic characteristics of initially designed configuration. Since the given wing planform did not fully satisfy the design requirements, local flow control devices such as vortilon, vortex generator and flow fence were used to delay separation and to enhance aerodynamic characteristics. Also decision making processes of design parameters such as vertical tail boom length, the location, size and the incidence angle of horizontal tail were discussed. The general aerodynamic characteristics of forward swept wing for various control surface deflection conditions of flap, aileron and elevator were also given.