• Journal of the Korea Society of Computer and Information
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• v.10 no.3 s.35
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• pp.11-18
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• 2005

In this paper, we propose a new technology mapping algorithm for CPLD consider area under time constraint. This algorithm detect feedbacks from boolean networks, then variables that have feedback are replaced to temporary variables. Creating the temporary variables transform sequential circuit to combinational circuit. The transformed circuits are represented to DAG. After traversing all nodes in DAG, the nodes that have output edges more than two are replicated and reconstructed to fanout free tree. Using time constraints and delay time of device, the number of graph partitionable multi-level is decided. Several nodes in partitioned clusters are merged by collapsing, and are fitted to the number of OR-terms in a given CLB by bin packing. Proposed algorithm have been applied to MCNC logic synthesis benchmark circuits, and have reduced the number of CLBs by $62.2\%$ than those of DDMAP. And reduced the number of CLBs by $17.6\%$ than those of TEMPLA.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.37C no.10
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• pp.977-985
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• 2012

Recently, many countries have been developing new protocols to improve the performance of tactical ad hoc networks for implementing NCW (Network Centric Warfare). Combat net radio (CNR) networks are the most important communication infra for the ground forces such as infantry of Army. U.S. Army had developed MIL-STD-188-220D that is the Interoperability Standard for DMTDs (Digital Messages Transfer Device Subsystems) for voice and data communication in CNR. MIL-STD-188-220D is a candidate for MAC protocol of TMMR which is next radio and has a few constraints to used in TMMR. NAD (Network Access Delay) defined in MIL-STD-188-220D needs time synchronization to avoid collision. However, it is difficult for time synchronization to fit in multi-hop environment. We suggest the enhanced DAP (Deterministic Adaptable Priority)-NAD to prevent conflicts and decrease delays in multi-hop CNR. Simulation results show that the proposed scheme improves the performance in multi-hop CNR networks.

• Journal of Korea Water Resources Association
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• v.52 no.8
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• pp.565-573
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• 2019

An optimization model of water intake planning is developed based on a linear programming (LP) for the intelligent water purification plant operation system. The proposed optimization model minimizes the water treatment costs of raw water purification by considering a time-delay of treatment process and hourly electricity tariff, which is subject to various operation constraints, such as water intake limit, storage tank capacity, and water demand forecasts. For demonstration, the developed model is applied to H water purification center. Here, we have tested three optimization strategies and the results are compared and analyzed in economic and safety aspects. The optimization model is expected to be used as a decision support tool for optimal water intake scheduling of domestic water purification centers.

• KSII Transactions on Internet and Information Systems (TIIS)
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• v.15 no.7
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• pp.2496-2512
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• 2021

The requirements for powerful computing capability, high capacity, low latency and low energy consumption of emerging services, pose severe challenges to the fifth-generation (5G) network. As a promising paradigm, mobile edge networks can provide services in proximity to users by deploying computing components and cache at the edge, which can effectively decrease service delay. However, the coexistence of heterogeneous services and the sharing of limited resources lead to the competition between various services for multiple resources. This paper considers two typical heterogeneous services: computing services and content delivery services, in order to properly configure resources, it is crucial to develop an effective offloading and caching strategies. Considering the high energy consumption of 5G base stations, this paper considers the hybrid energy supply model of traditional power grid and green energy. Therefore, it is necessary to design a reasonable association mechanism which can allocate more service load to base stations rich in green energy to improve the utilization of green energy. This paper formed the joint optimization problem of computing offloading, caching and resource allocation for heterogeneous services with the objective of minimizing the on-grid power consumption under the constraints of limited resources and QoS guarantee. Since the joint optimization problem is a mixed integer nonlinear programming problem that is impossible to solve, this paper uses deep reinforcement learning method to learn the optimal strategy through a lot of training. Extensive simulation experiments show that compared with other schemes, the proposed scheme can allocate resources to heterogeneous service according to the green energy distribution which can effectively reduce the traditional energy consumption.

• KSII Transactions on Internet and Information Systems (TIIS)
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• v.15 no.11
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• pp.4244-4274
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• 2021

The utilization of UAVs in various fields has led to the development of flying ad hoc network (FANET) technology. In a network environment with highly dynamic topology and frequent link changes, the traditional routing technology of FANET cannot satisfy the new communication demands. Traditional routing algorithm, based on geographic location, can "fall" into a routing hole. In view of this problem, we propose a geolocation routing protocol based on multi-agent reinforcement learning, which decreases the packet loss rate and routing cost of the routing protocol. The protocol views each node as an intelligent agent and evaluates the value of its neighbor nodes through the local information. In the value function, nodes consider information such as link quality, residual energy and queue length, which reduces the possibility of a routing hole. The protocol uses global rewards to enable individual nodes to collaborate in transmitting data. The performance of the protocol is experimentally analyzed for UAVs under extreme conditions such as topology changes and energy constraints. Simulation results show that our proposed QLGR-S protocol has advantages in performance parameters such as throughput, end-to-end delay, and energy consumption compared with the traditional GPSR protocol. QLGR-S provides more reliable connectivity for UAV networking technology, safeguards the communication requirements between UAVs, and further promotes the development of UAV technology.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.43 no.6 s.348
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• pp.23-29
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• 2006

It is difficult to apply conventional security algorithms to the wireless sensor networks composed of nodes that have resource constraints such as memory, computing, power resources limitation. Generally, shared key based algorithms with low resource consumption and short key length are used for broadcast packets in authentication of base station. But it is not suitable that all the nodes hold the same shared key only for packet authentication. Recently, broadcast authentication algorithm for sensor network is proposed, which uses key chain generation by one-way hash function, Message Authentication Code generation by each keys of the key chains and delayed key disclosure. It provides suitable authentication method for wireless sensor networks but may leads to inefficient consequence with respect to network conditions such as broadcast ratio, key chain level, and so on. In this paper, we propose an improved broadcast authentication algorithm that uses key chain link and periodical key disclosure. We evaluated the performance of proposed algorithm using TOSSIM(TinyOS Simulator) in TinyOS. The results show that the proposed algorithm ensures low authentication delay, uses memory and computing resource of receiving nodes efficiently and reduces the amount of packet transmitting/receiving.

• Korean Journal of Remote Sensing
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• v.28 no.1
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• pp.121-128
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• 2012

High resolution intertidal DEM is a basic material for science research like sedimentation/erosion by ocean current, and is invaluable in a monitoring of environmental changes and practical management of coastal wetland. Since the intertidal zone changes rapidly by the inflow of fluvial debris and tide condition, remote sensing is an effective tool for observing large areas in short time. Although radar interferometry is one of the well-known techniques for generating high resolution DEM, conventional repeat-pass interferometry has difficulty on acquiring enough coherence over tidal flat due to the limited exposure time and the rapid changes in surface condition. In order to overcome these constraints, we tested the feasibility of radar interferometry using Cosmo-SkyMed tandem-like one-day data and ERS-ENVISAT cross tandem data with very short revisit period compared to the conventional repeat pass data. Small temporal baseline combined with long perpendicular baseline allowed high coherence over most of the exposed tidal flat surface in both observations. However the interferometric phases acquired from Cosmo-SkyMed data suffer from atmospheric delay and changes in soil moisture contents. The ERS-ENVISAT pair, on the other hand, provides nice phase which agree well with the real topography, because the atmospheric effect in 30-minute gap is almost same to both images so that they are cancelled out in the interferometric process. Thus, the cross interferometry with very small temporal baseline and large perpendicular baseline is one of the most reliable solutions for the intertidal DEM construction which requires very accurate mapping of the elevation.

• Journal of the Korean Institute of Telematics and Electronics C
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• v.36C no.10
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• pp.17-28
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• 1999

In this paper, an ASIC emulation system called ACE (ASIC Emulator) is proposed. It can produce the prototype of target ASIC in a short time and verify the function of ASIC circuit immediately The ACE is consist of emulation software in which there are EDIF reader, library translator, technology mapper, circuit partitioner and LDF generator and emulation hardware including emulation board and logic analyzer. Technology mapping is consist of three steps such as circuit partitioning and extraction of logic function, minimization of logic function and grouping of logic function. During those procedures, the number of basic logic blocks and maximum levels are minimized by making the output to be assigned in a same block sharing product-terms and input variables as much as possible. Circuit partitioner obtain chip-level netlists satisfying some constraints on routing structure of emulation board as well as the architecture of FPGA chip. A new partitioning algorithm whose objective function is the minimization of the number of interconnections among FPGA chips and among group of FPGA chips is proposed. The routing structure of emulation board take the advantage of complete graph and partial crossbar structure in order to minimize the interconnection delay between FPGA chips regardless of circuit size. logic analyzer display the waveform of probing signal on PC monitor that is designated by user. In order to evaluate the performance of the proposed emulation system, video Quad-splitter, one of the commercial ASIC, is implemented on the emulation board. Experimental results show that it is operated in the real time of 14.3MHz and functioned perfectly.

• Journal of Korean Society of Transportation
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• v.22 no.7 s.78
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• pp.131-137
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• 2004

Conventional traffic signal optimization models assume that green intervals for pedestrian crossings are given as exogenous inputs such as minimum green intervals for straight-ahead movements. As the result, in reality, the green intervals of traffic movements may not distribute adequately by the volume/saturation-flow of them. In this paper, we proposed signal optimization models formulated in BMILP to integrate pedestrian crossings into traffic movements under under-saturated traffic flow. The model simultaneously optimizes traffic and pedestrian movements to minimize weighted queues of primary queues during red interval and secondary queues during queue clearance time. A set of linear objective function and constraints set up to ensure the conditions with respect to pedestrian and traffic maneuvers. Numerical examples are given by pedestrian green intervals and the number of pedestrian crossings located at an arm. Optimization results illustrated that pedestrian green intervals using proposed models are greater than those using TRANSYT-7F, but opposite in the ratios of pedestrian green intervals to the cycle lengths. The simulation results show that proposed models are superior to TRANSYT-7F in reducing delay, where the longer the pedestrian green interval the greater the effect.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.37 no.4
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• pp.80-89
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• 2000

In this paper, we propose a new CPLD technology mapping algorithm for sequential circuit under time constraints. The algorithm detects feedbacks of sequential circuit, separate each feedback variables into immediate input variable, and represent combinational part into DAG. Also, among the nodes of the DAG, the nodes that the number of outdegree is more than or equal to 2 is not separated, but replicated from the DAG, and reconstructed to fanout-free-tree. To use this construction method is for reason that area is less consumed than the TEMPLA algorithm to implement circuits, and process time is improved rather than TMCPLD within given time constraint. Using time constraint and delay of device the number of partitionable multi-level is defined, the number of OR terms that the initial costs of each nodes is set to and total costs that the$^1$costs is set to after merging nodes is calculated, and the nodes that the number of OR terms of CLBs that construct CPLD is excessed is partitioned and is reconstructed as subgraphs. The nodes in the partitioned subgraphs is merged through collapsing, and the collapsed equations is performed by bin packing so that it fit to the number of OR terms in the CLBs of a given device. In the results of experiments to MCNC circuits for logic synthesis benchmark, we can shows that proposed technology mapping algorithm reduces the number of CLBs by 15.58% rather than the TEMPLA, and reduces process time rather than the TMCPLD.