• Title/Summary/Keyword: delay constraint

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Field Application of Insulation Curing Method with Double Bubble Sheets Subject to Cold Weather (이중버블시트를 이용한 단열양생공법의 한중콘크리트 현장적용)

  • Hong, Seak-Min;Baek, Dae-Hyun;Kim, Jong;Jeon, Chung-Kun;Han, Min-Cheol;Han, Cheon-Goo
    • Proceedings of the Korean Institute of Building Construction Conference
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    • 2008.05a
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    • pp.57-60
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    • 2008
  • This study investigated the results of insulation heat curing method using double layer bubble sheet in slab concrete and mass concrete in cold weather environment. First of all, when double bubble sheets are applied, it was shown that slab concrete was protected from early freezing by remaining between 6 and 15℃ even in case outside temperature drops -9℃ below zero until the 2nd day from piling, and in the case of mass concrete, with the maximum temperature difference between the center and surface less than 4℃, crack occurrence index was close to 2 and no hydration heat crack occurred by internal constraint. The insulation heat preservation curing method using the double bubble sheet applied in this field prevented early freezing owing to stable curing temperature management, deterring concrete strength development delay at low temperature, and obtained the needed strength. Also, it was proven that the method is highly effective and economic for cold weather concrete quality maintenance through curing cost reduction like construction period shortening and labor cost reduction, etc by reducing the process of temporary equipment installation and disassembling.

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The Method of Reducing the Delay Latency to Improve the Efficiency of Power Consumption in Wireless Sensor Networks

  • Ho, Jang;Son, Jeong-Bong
    • 한국정보컨버전스학회:학술대회논문집
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    • 2008.06a
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    • pp.199-204
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    • 2008
  • Sensor nodes have various energy and computational constraints because of their inexpensive nature and ad-hoc method of deployment. Considerable research has been focused at overcoming these deficiencies through faster media accessing, more energy efficient routing, localization algorithms and system design. Our research attempts to provide a method of improvement MAC performance in these issues. We show that traditional carrier-sense multiple access(CSMA) protocols like IEEE 802.11 do not handle the first constraint adequately, and do not take advantage of the second property, leading to degraded latency and throughput as the network scales in size, We present more efficient method of a medium access for real-time wireless sensor networks. Proposed MAC protocol is a randomized CSMA protocol, but unlike previous legacy protocols, does not use a time-varying contention window from which a node randomly picks a transmission slot. To reduce the latency for the delivery of event reports, it carefully decides a fixed-size contention window, non-uniform probability distribution of transmitting in each slot within the window. We show that it can offer up to several times latency reduction compared to legacy of IEEE 802.11 as the size of the sensor network scales up to 256 nodes using widely used simulator ns-2. We, finally show that proposed MAC scheme comes close to meeting bounds on the best latency achievable by a decentralized CSMA-based MAC protocol for real-time wireless sensor networks which is sensitive to latency.

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Inter-layer Texture and Syntax Prediction for Scalable Video Coding

  • Lim, Woong;Choi, Hyomin;Nam, Junghak;Sim, Donggyu
    • IEIE Transactions on Smart Processing and Computing
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    • v.4 no.6
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    • pp.422-433
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    • 2015
  • In this paper, we demonstrate inter-layer prediction tools for scalable video coders. The proposed scalable coder is designed to support not only spatial, quality and temporal scalabilities, but also view scalability. In addition, we propose quad-tree inter-layer prediction tools to improve coding efficiency at enhancement layers. The proposed inter-layer prediction tools generate texture prediction signal with exploiting texture, syntaxes, and residual information from a reference layer. Furthermore, the tools can be used with inter and intra prediction blocks within a large coding unit. The proposed framework guarantees the rate distortion performance for a base layer because it does not have any compulsion such as constraint intra prediction. According to experiments, the framework supports the spatial scalable functionality with about 18.6%, 18.5% and 25.2% overhead bits against to the single layer coding. The proposed inter-layer prediction tool in multi-loop decoding design framework enables to achieve coding gains of 14.0%, 5.1%, and 12.1% in BD-Bitrate at the enhancement layer, compared to a single layer HEVC for all-intra, low-delay, and random access cases, respectively. For the single-loop decoding design, the proposed quad-tree inter-layer prediction can achieve 14.0%, 3.7%, and 9.8% bit saving.

SNU AGN Monitoring Project (SAMP) using reverberation mapping of luminous AGNs

  • Jeon, Yiseul;Woo, Jong-Hak
    • The Bulletin of The Korean Astronomical Society
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    • v.41 no.1
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    • pp.70.4-71
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    • 2016
  • The links between super-massive black hole masses and their host galaxy properties are observed, indicating that black hole growth and host galaxy evolution are closely related. Reverberation mapping, which uses the time delay from the central black hole to broad line regions, is one of the best methods to estimate masses of black holes of active galactic nuclei (AGNs). However, only masses of about 50 black holes have been determined in reverberation mapping studies so far, and most of them are limited to optical luminosities below 10^45 erg/s due to the challenges of long-term time domain observations in both photometry and spectroscopy. In this project, we expand reverberation mapping samples to higher luminosities of > 10^44.5 erg/s at 0.1 < z < 0.35, that have expected time lags of 40 - 250 light days. Photometric (using LOAO 1-m and MDM 1.3-m) and spectroscopic (using MDM 2.4-m and Lick 3-m) monitoring campaigns are being conducted for a 3 year duration and 20 day cadence. Precedent photometric observations in 2015B show some targets with variability and follow-up spectroscopic observations are on-going. In this presentation, we introduce our project, present reverberation mapping simulation results, and preliminary results on photometry. These reverberation mapping masses of relatively high luminous AGNs will provide a strong constraint on black hole mass calibration, e.g., the single-epoch mass estimation.

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Distributed Multi-Hop Multicast Transmission Scheme for Low-Power and Low-Complexity Wireless Devices (저 전력 저 복잡도 무선 기기를 위한 분산적인 다중 홉 멀티 캐스트 중계 기법)

  • Ko, Byung Hoon;Jeon, Ki-Jun;Lee, Seong Ro;Kim, Kwang Soon
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.40 no.5
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    • pp.931-937
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    • 2015
  • Distributed relay scheme for wireless ad hoc multi-hop multicast network composed of low-power and low-complexity wireless devices with high density is proposed. The proposed relay scheme is shown to be better than flooding, which is the distributed relay scheme applied to ZigBee, in the outage probability and the multicast transmission rate by simulations.

A Trellis-based Technique for Blind Channel Estimation and Equalization

  • Cao, Lei;Chen, Chang-Wen;Orlik, Philip;Zhang, Jinyun;Gu, Daqing
    • Journal of Communications and Networks
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    • v.6 no.1
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    • pp.19-25
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    • 2004
  • In this paper, we present a trellis-based blind channel estimation and equalization technique coupling two kinds of adaptive Viterbi algorithms. First, the initial blind channel estimation is accomplished by incorporating the list parallel Viterbi algorithm with the least mean square (LMS) updating approach. In this operation, multiple trellis mappings are preserved simultaneously and ranked in terms of path metrics. Equivalently, multiple channel estimates are maintained and updated once a single symbol is received. Second, the best channel estimate from the above operation will be adopted to set up the whole trellis. The conventional adaptive Viterbi algorithm is then applied to detect the signal and further update the channel estimate alternately. A small delay is introduced for the symbol detection and the decision feedback to smooth the noise impact. An automatic switch between the above two operations is also proposed by exploiting the evolution of path metrics and the linear constraint inherent in the trellis mapping. Simulation has shown an overall excellent performance of the proposed scheme in terms of mean square error (MSE) for channel estimation, robustness to the initial channel guess, computational complexity, and channel equalization.

Design of a NeuroFuzzy Controller for the Integrated System of Voice and Data Over Wireless Medium Access Control Protocol (무선 매체 접근 제어 프로토콜 상에서의 음성/데이타 통합 시스템을 위한 뉴로 퍼지 제어기 설계)

  • Choi, Won-Seock;Kim, Eung-Ju;Kim, Beom-Soo;Lim, Myo-Taeg
    • Proceedings of the KIEE Conference
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    • 2001.07d
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    • pp.1990-1992
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    • 2001
  • In this paper, a NeuroFuzzy controller (NFC) with enhanced packet reservation multiple access (PRMA) protocol for QoS-guaranteed multimedia communication systems is proposed. The enhanced PRMA protocol adopts mini-slot technique for reducing contention cost, and these minislot are futher partitioned into multiple MAC regions for access requests coming from users with their respective QoS (quality-of-service) requirements. And NFC is designed to properly determine the MAC regions and access probability for enhancing the PRMA efficiency under QoS constraint. It mainly contains voice traffic estimator including the slot information estimator with recurrent neural networks (RNNs) using real-time recurrent learning (RTRL), and fuzzy logic controller with Mandani- and Sugeno-type of fuzzy rules. Simulation results show that the enhanced PRMA protocol with NFC can guarantee QoS requirements for all traffic loads and further achieves higher system utilization and less non real-time packet delay, compared to previously studied PRMA, IPRMA, SIR, HAR, and F2RAC.

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Resource Leveling using Genetic Algorithm (유전알고리즘을 활용한 자원평준화 방법론)

  • Gwak, Han-Seong;Bea, Sang-Hee;Lee, Dong-Eun
    • Journal of the Architectural Institute of Korea Structure & Construction
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    • v.34 no.2
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    • pp.67-74
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    • 2018
  • Resource leveling minimizes resource fluctuations by deferring the earliest start times (ESTs) of non-critical activities within their corresponding total float. The intentional float-consumption for resource leveling purpose reduces the schedule delay contingency. This paper presents a method called Genetic Algorithm based Resource Leveling (GARL) that minimizes resource fluctuations and float-consumption impact over project duration. It identifies activities that are less sensitive to float-consumption and performs resource leveling using those activities. The study is of value to project scheduler because GARL identifies the set of activities to be deferred and the number of shift day(s) of each and every activities in the set within its total float expeditiously. It contributes to establish a baseline schedule which implements an optimal resource leveling plan. A case study is presented to verify the validity and usability of the method. It was confirmed that GARL satisfies the project duration constraint by considering resource fluctuations and float-consumption over project duration.

Bit-Rate Control Using Histogram Based Rate-Distortion Characteristics (히스토그램 기반의 비트율-왜곡 특성을 이용한 비트율 제어)

  • 홍성훈;유상조;박수열;김성대
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.24 no.9B
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    • pp.1742-1754
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    • 1999
  • In this paper, we propose a rate control scheme, using histogram based rate-distortion (R-D) estimation, which produces a consistent picture quality between consecutive frames. The histogram based R-D estimation used in our rate control scheme offers a closed-form mathematical model that enable us to predict the bits and the distortion generated from an encoded frame at a given quantization parameter (QP) and vice versa. The most attractive feature of the R-D estimation is low complexity of computing the R-D data because its major operation is just to obtain a histogram or weighted histogram of DCT coefficients from an input picture. Furthermore, it is accurate enough to be applied to the practical video coding. Therefore, the proposed rate control scheme using this R-D estimation model is appropriate for the applications requiring low delay and low complexity, and controls the output bit-rate ad quality accurately. Our rate control scheme ensures that the video buffer do not underflow and overflow by satisfying the buffer constraint and, additionally, prevents quality difference between consecutive frames from exceeding certain level by adopting the distortion constraint. In addition, a consistent considering the maximum tolerance BER of the voice service. Also in Rician fading channel of K=6 and K=10, considering CLP=$10^{-3}$ as a criterion, it is observed that the performance improment of about 3.5 dB and 1.5 dB is obtained, respectively, in terms of $E_b$/$N_o$ by employing the concatenated FEC code with pilot symbols.

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Development of CPLD technology mapping control algorithm for Sequential Circuit under Time Constraint (시간제약 조건하에서 순차 회로를 위한 CPLD 기술 매핑 제어 알고리즘 개발)

  • Youn, Chung-Mo;Kim, Jae-Jin
    • Journal of the Korean Institute of Telematics and Electronics T
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    • v.36T no.4
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    • pp.71-81
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    • 1999
  • We propose a new CPLD(Complexity Programmable Logic Device) technology mapping algorithm improving run-time under time constraint. In our technology mapping algorithm, a given logic equation is constructed as the DAG(Directed Acyclic Graph) type, then the DAG is reconstructed by replicating the node that outdegree is more than or equal to 2. As a result, it makes delay time and the number of CLBs, run-time to be minimized. Also, after the number of multi-level is defined and cost of each nodes is calculated, the graph is partitioned in order to fit to k that is the number of OR term within CLB. The partitioned nodes are merged through collapsing and bin packing is performed in order to fit to the number of OR term within CLB(Configurable Logic Block). In the results of experiments to MCNC circuits for logic synthesis benchmark, we can shows that proposed technology mapping algorithm reduces run-time and the number of CLBs much more than the TEMPLA.

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