• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
• /
• v.26 no.12
• /
• pp.68-73
• /
• 2012

In this paper, the fault current limiting characteristics of a flux-lock type superconducting fault current limiter (SFCL) with peak current limiting function were analyzed through its short-circuit tests. The setting condition for the peak current limiting operation was derived from its electrical equivalent circuit, which was dependent on the inductance ratio between the third coil and the first coil. Through the analysis on the short-circuit tests for the flux-lock type SFCLs with the different inductance ratio between the third coil and the first coil, the setting value for the peak current limiting operation of the flux-lock type SFCL with peak current limiting function could be confirmed to be adjusted with the variation of the inductance ratio between the third coil and the first coil.

• Proceedings of the KIEE Conference
• /
• 2006.10c
• /
• pp.339-341
• /
• 2006

This paper presents a new method on controller design of brushless dc motors. In such drives the current ripples are generated by motor inductance in stator windings and the back EMF. To suppress the current ripples the current controller is generally used. To minimize the size and the cost of the drives it is desirable to control motors without the current controller and the current sensing circuits. To estimate the motor current it is modeled by a neural network that is configured as an output-error dynamic system. The identified model is essentially a one step ahead prediction structure in which fast inputs and outputs are used to calculate the current output. Using the model, effective estimator to compensate the effects of disturbance has been designed. The effectiveness of the proposed current estimator is verified through experiments.

• Progress in Superconductivity and Cryogenics
• /
• v.2 no.1
• /
• pp.31-34
• /
• 2000

this paper deals with the initial magnetic field decay for a large scale superconducting magnet e.g. NMR/MRI magnet. The high resolution image can not be obained during the periods of the initial field decay. It is known that all superconducting materials have the property of diamagnetism. This diamagnetism is usually explained with the concept of screening current. We assumed that the existence of the screening currebt. we assumed that the existence of the screening current makes the current distribution in the superconducting wire non-uniform. And the initial magnetic field decay is caused steady current state in the view of its pattern. The initial magnetic field decay is caused by the change of the current distribution between the energizing state and persistent current mode. in this paper the theoretical analysis for the current distributions has been introduced for each state. The experiments have been carried out to verify transport currents in order to veperiments, it small at the higher transport current.

• Progress in Superconductivity and Cryogenics
• /
• v.1 no.1
• /
• pp.33-37
• /
• 1999

The fast current and field ramp-up experiment was done with the superconducting magnet that is made of three non-insulated strand CICC (Cable-In- Conduit Conductor). The shunt the unbalanced current magnet enabled the unbalanced current measurement which is believed to be associated with the loop current. To explain the generation of the loop current during the current ramp up. the steady-state three strand loop current model was proposed. This model gives an explanation for the relation between the loop current and the twist geometry of the strands. According to this model. The twisr geometry and the surface contact resistance of the strand has significant influence on the generation of the loop current especially in the large superconducting magnet.

• The Transactions of The Korean Institute of Electrical Engineers
• /
• v.58 no.2
• /
• pp.301-307
• /
• 2009

In the paralleled converter module with peak current mode control, current imbalance appears when the voltage controllers with integral control of converter module are not exactly identical. In this paper, the voltage controller is designed to equal the current command of each converter module using the current command bus. The current balance controller is also proposed to balance the average currents of converter modules with imbalaced inductance. It is designed to have good transient response. Proposed method is implemented with the paralleled 2-module and 4-module boost converters with imbalanced inductance. Experimental results verify the performance of current share during both steady and transient states of converter.

• Journal of Electrical Engineering and Technology
• /
• v.13 no.2
• /
• pp.533-539
• /
• 2018

In this paper, the transformer type superconducting fault current limiter (SFCL) with additionally coupled circuit was suggested and its peak fault current limiting characteristics due to the fault condition to affect the fault current were analyzed through the fault current limiting tests. The suggested transformer type SFCL is basically identical to the previous transformer type SFCL except for the additional coupled circuit. The additional coupled circuit, which consists of the magnetically coupled winding to the primary and the secondary windings together with another superconducting element and is connected in parallel with the secondary winding of the transformer type SFCL, is contributed to the peak fault current limiting operation for the larger transient fault current directly after the fault occurrence. To confirm the fault current limiting operation of the suggested SFCL, the fault current limiting tests of the suggested SFCL were performed and its effective peak fault current limiting characteristics were analyzed through the analysis on the electrical equivalent circuit.

• Progress in Superconductivity and Cryogenics
• /
• v.7 no.3
• /
• pp.17-20
• /
• 2005

AC loss of a high $T_c$ superconducting conductor has a strong influence on the economic viability of a superconducting fault current limiter, which offers an attractive means to limit short circuit current in the power systems. Therefore, several samples of the fault current limiting coils have been fabricated and the effect of conductor's arrangement and current direction on AC loss characteristics investigated experimentally The test result shows that the AC losses measured in the fault current limiting coils depend significantly on the conductor's arrangement. Futhermore, they are also considerably influenced by the conductor's current direction. The AC loss measured in the face-to-face arrangement is smallest among the fault current limiting coil samples.

• The Transactions of the Korean Institute of Electrical Engineers D
• /
• v.55 no.6
• /
• pp.255-260
• /
• 2006

Arc Fault Current is an which occurrs in two opposite electrode. In this paper, arc current control algorithm is designed for the interruption of arc fault current which is occurred in the low voltage network. This arc is one of the main causes of electric fire. General arc current sensor has troubles for detecting arc currents, thus we would like to propose the arc current detection method without current sensor. In this parer, arc discharge currents within power lines are being detected through the arc current control algorithm.

• Proceedings of the KIEE Conference
• /
• 2003.11a
• /
• pp.91-94
• /
• 2003

A DC railway system has low feeder voltage, The fault current can be smaller than the current of load starting. So it is important to discriminate between the small fault current and the load starting current. The load starting current increases step by step but the fault current increases all at once. So the type of ${\Delta}I$ relay(50F) was developed using the different characteristics between the load starting current and the fault current. As for the load starting current, the time constant of load current at each step is much smaller than that of the fault current. First, to detect faults in DC railway systems, an algorithm using the time constant calculated by the method of least squares is presented in this paper. Secondly, to compose a protection scheme for DC railway systems is presented in this paper.

• Journal of the Institute of Electronics Engineers of Korea SD
• /
• v.39 no.4
• /
• pp.93-103
• /
• 2002

A new current mirror for high-accuracy current-mode signal processing and integrated circuit design was proposed. The current mirror adopts the technique of an adaptive feedback to reduce the input impedance and the output stage of regulated cascode current mirror to increase the output impedance. Simulation results show that the current mirror has input impedance of 0.9Ω, the output impedance of 415 MΩ, and current gain of 0.96 at the supply voltage Vcc=5V. The power dissipation is 1.5㎽. In order to certify the applicability of the proposed current mirror, a voltage-to-current converter using the current mirror is designed. Simulation results show that the converter has good agreement with theoretical equation and has three times better conversion characteristics when compared with voltage-to-current converter using Wilson current mirror.