• Journal of Electrical Engineering and Technology
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• 제8권2호
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• pp.206-214
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• 2013

This paper proposes a new method for monitoring local voltage stability using the saddle node bifurcation set or loadability boundary in two dimensional power parameter space. The method includes three main steps. First step is to determine the critical buses and the second step is building the static voltage stability boundary or the saddle node bifurcation set. Final step is monitoring the voltage stability through the distance from current operating point to the boundary. Critical buses are defined through the right eigenvector by direct method. The boundary of the static voltage stability region is a quadratic curve that can be obtained by the proposed method that is combining a variation of standard direct method and Thevenin equivalent model of electric power system. And finally the distance is computed through the Euclid norm of normal vector of the boundary at the closest saddle node bifurcation point. The advantage of the proposed method is that it gets the advantages of both methods, the accuracy of the direct method and simple of Thevenin Equivalent model. Thus, the proposed method holds some promises in terms of performing the real-time voltage stability monitoring of power system. Test results of New England 39 bus system are presented to show the effectiveness of the proposed method.

• Progress in Superconductivity
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• 제3권1호
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• pp.65-69
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• 2001

We measured the transport properties of$ YBa_2$$Cu_3$$O_{x}$ ramp-edge junction fabricated with interface-engineered barrier. The current-voltage characteristics show a typical resistively-shunted junction like behavior Voltage noise measurement revealed that the main source of the 1/f noise is the critical current and resistance fluctuations. The analysis of the noise data showed that the critical current fluctuations increase with temperature, whereas the resistance fluctuations are almost constant, and both fluctuations are almost correlated. The smaller magnitude of the critical current and resistance fluctuations seems to result from the columnar-deflects.s.

• 한국정보디스플레이학회:학술대회논문집
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• 한국정보디스플레이학회 2002년도 International Meeting on Information Display
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• pp.914-917
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• 2002

We have obtained high performance and low voltage driving OCB panel by reducing the critical voltage and retardation matching between liquid crystal layer and compensation films. The critical voltage in the panel has been minimized by flattening color filter layer and optimizing a rubbing process. In addition, an appropriate retardation of the film and LC layer has scanned to achieve low driving voltage and high transmission. The proto-type 17" WXGA OCB panel has demonstrated with less than 5V drive and over 80 degree for all viewing direction except for rubbing direction with over 90% of TN light efficiency.

• Progress in Superconductivity
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• 제4권1호
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• pp.59-63
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• 2002

10-V Josephson junction array arranged in 8 parallel stripline paths was fabricated using self-aligning and reactive ion etching techniques. These techniques were introduced in detail with aim of obtaining high-quality junctions. The array has 18,184 Josephson junctions with the area of $12\mu\textrm{m}$$\times$$38\mu\textrm{m}$. The gap voltage and minimum critical current density were about 2.7 ㎷ and ／$23 A\textrm{cm}^2$, respectively. And the critical current density and leakage current at 5 volt were about 27 $A／\textrm{cm}^2$ and $5\mu\textrm{A}$, respectively When operated in the frequency range of 76-88 ㎓, the away generated constant voltage steps up to 14-19 V. The step size near 10-V was more than 7 $\mu\textrm{A}$.

• 한국초전도ㆍ저온공학회논문지
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• 제8권3호
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• pp.49-53
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• 2006

A high temperature superconductor (HTS) has been developed for power applications such as power cables, fault current limiters and superconducting magnetic energy storage devices. For such applications it is required to understand the DC voltage-current characteristic of the HTS. which is important in analyzing AC loss and flux flow loss quantitatively. In this work, we have experimentally investigated influence of several factors, e.g. critical current density. degradation and AC external magnetic field, on the DC voltage-current characteristic. The measured results have been discussed in engineering application point of view.

• 한국초전도저온공학회:학술대회논문집
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• 한국초전도저온공학회 2000년도 KIASC Conference 2000 / 2000년도 학술대회 논문집
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• pp.166-169
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• 2000

Usually, the critical current of jointed BSCCO tapes degrades quite a bit compared to the normal unjointed tape regions. It has been thought that the current redistribution around the jointed region is the main cause it. We experimentally found the linear voltage components around the jointed area, especially in the transition region, which suggests that the current redistribution around the jointed area is the main reason of the critical current degradations.

• 한국초전도ㆍ저온공학회논문지
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• 제4권1호
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• pp.73-77
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• 2002

The variation of critical current by the formation of crack in a high temperature super-conducting tape was studied by experimental and numerical analyses. The current-voltage relation of HTS tape is measured by the four-point measurement method. Numerical analyses are used to solve two dimensional heat conduction equation, considering the temperature distribution. By comparing current-voltage relation of experimental and numerical results, the validity of numerical method is verified.

• 한국초전도저온공학회:학술대회논문집
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• 한국초전도저온공학회 2003년도 학술대회 논문집
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• pp.75-77
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• 2003

We have measured the escape rates of the Nb Josephson junction from its zero-voltage state. The critical current measurements were carried out in repeatedly sweeping the current-voltage characteristics of the junction with a current ramp. From the distribution of the critical current the escape temperature was determined by applying the thermal activation model.

• JSTS:Journal of Semiconductor Technology and Science
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• 제15권6호
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• pp.678-684
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• 2015

Near-threshold computing (NTC) is now regarded as a promising candidate for innovative power reduction, which cannot be achieved with conventional super-threshold computing (STC). However, performance degradation and vulnerability to process variation in the NTC regime are the primary concerns. In this paper, we propose a voltage- and frequency-tuning methodology for mitigating the process-variation-induced problems in NTC-based manycore architectures. To implement the proposed methodology, we build up multiple-voltage multiple-frequency (MVMF) islands and apply a voltage-frequency tuning algorithm based on the critical-path monitoring technique to reduce the effects of process variation and maximize energy efficiency in the post-silicon stage. Experimental results show that the proposed methodology reduces overall power consumption by 8.2-20.0%, compared to existing methods in variation-sensitive NTC environments.

• 조명전기설비학회논문지
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• 제24권9호
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• pp.36-43
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• 2010

This paper proposes a new type of voltage sag-swell compensator based on a Z-source AC-AC converter. The proposed topology employs a pulse width modulation (PWM) Z-source AC-AC converter along with a injection transformer. A safe commutation strategy is used to eliminate voltage spikes on switches without snubber circuit. During a voltage sag or swell, the proposed system controls the adding or missing voltage and maintains the rated voltage of sinusoidal waveform at the terminals of the critical loads. The proposed system is able to compensate 20[%] voltage swell and is also able to compensate 60[%] voltage sag. In order to control and detect the voltage sag and swell, the peak voltage detection method is applied. Also, the operating principles of the proposed system are described, and a circuit analysis is provided. Finally, PSIM simulation and experimental results are presented to verify the proposed concept and theoretical analysis.