• Journal of information and communication convergence engineering
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• v.16 no.2
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• pp.84-92
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• 2018

For large wireless sensor networks running on battery power, the time synchronization of all sensor nodes is becoming a crucial task for waking up sensor nodes with exact timing and controlling transmission and reception timing. However, as network size increases, this synchronization process tends to require long processing time consume significant power. Furthermore, a naïve synchronization scheduler may leave some nodes unsynchronized. This paper proposes a power-efficient scheduling algorithm for time synchronization utilizing the notion of density, which is defined by the number of neighboring nodes within wireless range. The proposed scheduling algorithm elects a sequence of minimal reference nodes that can complete the synchronization with the smallest possible number of hops and lowest possible power consumption. Additionally, it ensures coverage of all sensor nodes utilizing a two-pass synchronization scheduling process. We implemented the proposed synchronization algorithm in a network simulator. Extensive simulation results demonstrate that the proposed algorithm can reduce the power consumption required for the periodic synchronization process by up to 40% for large sensor networks compared to a simplistic multi-hop synchronization method.

• Journal of Korea Society of Digital Industry and Information Management
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• v.9 no.3
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• pp.67-78
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• 2013

In this paper, We proposed an development method of application framework for using the precision time protocol(PTP) based on physical layer devices to synchronize clocks across a network with IEEE1588 capable devices. The algorithm was not designed as a complete solution across all conditions, but is intended to show the feasibility of such a for the PTP(Precision Time Protocol) based on time synchronization of heterogeneous network between devices that support in IEEE 1588 Standard application framework. With synchronization messages per second, the system was able to accurately synchronize across a single heavily loaded switch. we describes a method of synchronization that provides much more accurate synchronization in systems with larger networks. In this paper, using the IEEE 1588 PTP support for object-oriented modeling techniques through the 'application framework development Development(AFDM)' is proposed. The method described attempts to detect minimum delays, or precision packet probe and packet metrics. The method also takes advantage of the Tablet PC(Primary to Secondary) clock control mechanism to separately control clock rate and time corrections, minimizing overshoot or wild swings in the accuracy of the clock. We verifying the performance of PTP Systems through experiments that proposed method.

• Kyungpook Mathematical Journal
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• v.55 no.3
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• pp.563-586
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• 2015

In this research work, a seven-term 3-D novel jerk chaotic system with two quadratic nonlinearities has been proposed. The basic qualitative properties of the novel jerk chaotic system have been described in detail. Next, an adaptive backstepping controller is designed to stabilize the novel jerk chaotic system with two unknown parameters. Moreover, an adaptive backstepping controller is designed to achieve complete chaos synchronization of the identical novel jerk chaotic systems with two unknown parameters. MATLAB simulations have been shown in detail to illustrate all the main results developed for the 3-D novel jerk chaotic system.

• Proceedings of the Korea Society of Information Technology Applications Conference
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• 2005.11a
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• pp.177-178
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• 2005

Wireless 1394 over IEEE802.15.3 must allow a data reserved for delivery over a wired 1394 network to be delivered over an IEEE802.15.3 wireless network through bridging IEEE 1394 to IEEE802.15.3. Isochronous transfers on the 1394 bus guarantee timely delivery of data. Specifically, isochronous transfers are scheduled by the bus so that they occur once every $125\;{\mu}s$ and require clock time synchronization to complete the real-time data transfer. IEEE1394.1 and Protocol Adaptation Layer for IEEE1394 over IEEE802.15.3 specify clock time synchronization for a wired 1394 bus network to a wired 1394 bus network and wireless 1394 nodes, which are IEEE802.15.3 nodes handling 1394 applications, over IEEE802.15.3. Thus, the clock time synchronizations are just defined within a homogeneous network environment like IEEE1394 or IEEE802.15.3 until now. This paper proposes new clock time synchronization method for wireless 1394 heterogeneous networks between 1394 and 802.15.3. If new method is adopted for various wireless 1394 products, consumer electronics devices such as DTV and Set-top Box or PC devices on a 1394 bus network can transmit real time data to the AV devices on the other 1394 bus in a different place via IEEE 802.15.3.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.19 no.3
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• pp.731-740
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• 2015

In the recent days, interests in machine-to-machine communication schemes in small-scale networks has been increasing with growing demands. TDMA(Time Division Multiple Access) can be used as a multiple access method in small-scale networks. However, time synchronization for TDMA is complicated or needs additional equipments. Such a large cost is not suitable for small-scale networks. We propose, BC-DESYNC, a efficient time synchronization for small-scale networks by extending DESYNC(DESYNChronization). DESYNC takes a long time to complete synchronization and doesn't guarantee the synchronization delay. BC-DESYNC uses CU(Central Unit) that performs a centralized control to achieve the 2-hop communication and guarantees the synchronization completion time by using Mimic firing and C-DESYNC scheme.

• The Transactions of the Korean Institute of Electrical Engineers
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• v.36 no.2
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• pp.107-113
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• 1987

A complete design of a new digital control circuit for a three-phase controlled rectifier is presented. The circuit consists of a gating signal generating ROM, down counter and adder. Proposed scheme is simple and quite adequate to the microprocessor-based digitally controlled systems. The basic principle and operation characteristics of the circuit are described and experimental-results show good dynamic performance. Synchronization problem with noisy reference is also discussed. The basic phylosophy developed can be extended to the other phase control system, e.g., cycloconverters, ac voltoge controllers, etc.

• KIPS Transactions on Computer and Communication Systems
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• v.3 no.9
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• pp.293-300
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• 2014

TDMA(Time Division Multiple Access) is a channel access scheme for shared medium networks. The shared frequency is divided into multiple time slots, some of which are assigned to a user for communication. Techniques for TDMA can be categorized into two classes: synchronous and asynchronous. Synchronization is not suitable for small scale networks because it is complicated and requires additional equipments. In contrast, in DESYNC, a biologically-inspired algorithm, the synchronization can be easily achieved without a global clock or other infrastructure overhead. However, DESYNC spends a great deal of time to complete synchronization and does not guarantee the maximum time to synch completion. In this paper, we propose a lightweight synchronization scheme, C-DESYNC, which counts the number of participating nodes with GP (Global Packet) signal including the information about the starting time of a period. The proposed algorithm is mush simpler than the existing synchronization TDMA techniques in terms of cost-effective method and guarantees the maximum time to synch completion. Our simulation results show that C-DESYNC guarantees the completion of the synchronization process within only 3 periods regardless of the number of nodes.

• Journal of Institute of Control, Robotics and Systems
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• v.3 no.4
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• pp.373-380
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• 1997

In order to implement the real-time operating systems for robot controller, this paper proposes a systematic method for implementing the real-time kernel under the DOS environment. So far, we designed the robot control software and its own operating system simultaneously. Though robot operating systems have simple structure, it allows the developer to have a surplus time and effort to implement complete robot systems. In addition to this, in most cases of this type, operating systems does not support multitasking function, thus, low level hardware interrupts are used for real-time execution. Subsequently, some kinds of real-time tasks are hard to implement under this environment. Nowadays, the operating systems for robot controller requires multitasking functions, intertask communication and task synchronization mechanism, and rigorous real-time responsiveness. Thus, we propose an effective and low costs real-time systems for robot controller satisfying the various real-time characteristics. The proposed real-time systems are verified through real implementation.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.44 no.2
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• pp.15-21
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• 2007

In this paper, we propose a technique of a practical symbol acquisition and tracking using a low complex ADC and simple digital circuits for noncoherent asynchronous impulse-radio-based Ultra Wideband (IR-UWB) receiver based on energy detection. Compared to previous approaches of detecting an exact acquisition time that require much hardware resource, the proposed technique is to detect the target symbol by finding the symbol acquisition interval per symbol with a target symbo, thus the complexity of the complete signal processing and power consumption by ADC are reduced. To do this, we define the bit decision window (BDW) and analyze the relation between SNR, hardware resource, size of BDW and BER(Bit Error Rate). Using the results, the optimum BDW size for the minimum BER with limited hardware resource is selected. The proposed synchronization technique is verified with an aid of a simulator programmed by considering practical impulse channels.

• Fisheries and Aquatic Sciences
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• v.21 no.9
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• pp.23.1-23.8
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• 2018

Background: Russian sturgeon (Acipenser gueldenstaedtii) is an emerging candidate species in the Korean aquaculture domain owing to its highly valued caviar. Although the embryonic development of this species was previously described, the complete image data on the morphological differentiation of developing embryos have not been yet fully available. Further, with the viewpoint of larval production in hatchery, the effects of temperature on embryonic viability and the temporal window of hatching event have not been extensively studied. Hence, the objective of this study was to provide a complete set of photographic image data on the embryogenesis and also to examine the effects of incubation temperatures on embryonic viability and hatching event in farm-bred Russian sturgeon. Results: Typical characteristics of embryonic development including uneven, holoblastic cleavages with unequal blastomeres, followed by the formation of germ layer, neurulation, and organogenesis until hatching, were documented. Under different temperature conditions (12, 16, or $20^{\circ}C$), viability of embryos incubated at $12^{\circ}C$ was significantly lower as relative to those of 16 and $20^{\circ}C$ incubated embryos. Hatchability of embryos was higher, and the timing of hatching event was more synchronized at $20^{\circ}C$ than at 12 and $16^{\circ}C$. Conclusion: Data from this study suggest that the incubation of Russian sturgeon embryos at $20^{\circ}C$ would be desirable in the hatchery practice with respect to the good hatchability of embryos and the synchronization of hatching events. Additionally, the updated image data for complete embryonic development could be a useful reference guide for not only developmental researches but also artificial propagation of Russian sturgeon in farms.