• Title/Summary/Keyword: comparator method

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Evaluation Technique for Ratio Error of Current Transformer Comparator (전류변성기 비교기의 비오차 평가 기술)

  • Kim, Yoon-Hyoung;Han, Sang-Gil;Jung, Jae-Kap;Han, Sang-Ok
    • The Transactions of the Korean Institute of Electrical Engineers P
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    • v.57 no.3
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    • pp.291-295
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    • 2008
  • We have developed an evaluation technique for ratio errors of current transformer (CT) comparator by using the precise standard capacitors. By applying this technique for equivalent circuit of CT comparator evaluation system, we can obtain the calculated and measured ratio errors in the CT comparator. Thus we can evaluate ratio errors of CT comparator by comparing the calculated and measured ratio errors. Because this method requires only the standard capacitors, it is simple and easy method to reliability and accuracy maintenance of CT comparator. The method was applied to CT comparator under test with the ratio error ranges of $0{\sim}{\pm}10%$. The ratio error of the CT comparator under test theoretically obtained in this method are consistent with that measured for same CT comparator under test by using wide ratio error CT within an estimated expanded uncertainty (k = 2) in the overall ratio error ranges.

Evaluation Technique for Ratio Error and Phase Displacement of Current Transformer Comparator (전류변성기 비교기의 비오차 및 위상오차 평가기술)

  • Kim, Yoon-Hyoung;Han, Sang-Gil;Jung, Jae-Kap;Han, Sang-Ok
    • The Transactions of the Korean Institute of Electrical Engineers P
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    • v.57 no.4
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    • pp.437-443
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    • 2008
  • We have developed an evaluation technique for both ratio error and phase displacement of current transformer (CT) comparator by using the precise standard capacitors and resistors. By applying this technique to equivalent circuit of CT comparator evaluation system, we can obtain the calculated and measured ratio errors (or phase displacements) in the CT comparator. Thus we can evaluate ratio errors and phase displacement of CT comparator by comparing the calculated and measured ratio errors (or phase displacements). The method was applied to CT comparator under test with the ratio errors and phase displacement ranges of $0{\sim}{\pm}10%$ and $0{\sim}{\pm}7.5$ crad, respectively. Finally we have compared the ratio error and phase displacement of the CT comparator obtained in this method with specifications of two companies.

Evaluation technique for phase displacement of current transformer comparator (전류변성기 비교기의 위상오차 평가 기술)

  • Kim, Yoon-Hyoung;Han, Sang-Gil;Jung, Jae-Kap;Han, Sang-Ok
    • Proceedings of the KIEE Conference
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    • 2008.07a
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    • pp.2032-2033
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    • 2008
  • We have developed an evaluation technique for phase displacement of current transformer (CT) comparator by using the precise standard capacitors and resistors. By applying this technique for equivalent circuit of CT comparator evaluation system, we can obtain the calculated and measured phase displacement in the CT comparator. Thus we can evaluate phase displacement of CT comparator by comparing the calculated and measured phase displacement. The method was applied to CT comparator under test with the phase displacement ranges of $0{\sim}{\pm}7.5$ crad. Finally we have compared the phase displacement of the CT comparator under test theoretically obtained in this method with the specification.

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Evaluation for Ratio Error of Voltage Transformer Comparator using Standard Resistors (표준저항기를 이용한 전압변성기 비교기의 비오차 평가)

  • Han, Sang-Gil;Kim, Yoon-Hyoung;Jung, Jae-Kap;Han, Sang-Ok
    • The Transactions of the Korean Institute of Electrical Engineers P
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    • v.57 no.4
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    • pp.412-416
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    • 2008
  • We have developed the calibration technique of the VT comparator using nonreactive standard resistors, which evaluates both accuracy and linearity of the VT comparator by comparing experimental values with theoretical values. The correction values of VT comparator obtained by using both our method and wide ratio error VT are consistent within the expanded uncertainty. Furthermore the specification for ratio error of VT comparator have been revaluated.

New Method for Elimination of Comparator Offset Using the Fowler-Nordheim Stresses (Fowler-Nordheim 스트레스에 의한 MOS 문턱전압 이동현상을 응용한 비교기 옵셋 제거방법)

  • Chung, In-Young
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.46 no.3
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    • pp.1-9
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    • 2009
  • In this paper proposed a new method which adaptively eliminates comparator offsets using the threshold voltage shift by the Fowler-Nordheim stress. The method evaluates the sign of comparator offset and gives the FN stress to the stronger MOSFETs of the comparator, leading to offset reduction. We have used an appropriate stressing operation, named 'stress-packet', in order to converge the offset value to zero. We applied the method to the latch-type comparator which is prevalently used for DRAM bitline sense amplifier, and verified through experiments that offsets of the latch-type comparators are nearly eliminated with the stress-packet operations. We also discuss about the reliability issues that must be guaranteed for field application of this method.

Evaluation Technique for Linearity of Ratio Error of Instrument Transformer Comparator Using Voltage Transformer with Wide Range of Error Ratios (넓은 범위의 비오차를 갖는 전압변성기를 이용한 계기용 변성기 비교 측정 장치의 비오차 직선성 평가기술)

  • Jung Jae Kap;Kwon Sung Won;Kim Han Jun;Park Young Tae;Kim Myung Soo
    • The Transactions of the Korean Institute of Electrical Engineers B
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    • v.54 no.2
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    • pp.66-70
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    • 2005
  • Linearity of ratio error of instrument transformer comparator has been tested using wide ratio error voltage transformer(VT) with the ratio errors in the range of -3 % to 3 %. The technique is the method for evaluation of the linearity for instrument transformer comparator by comparing both the theoretical and experimental values in wide ratio error VT. The developed method has been successfully applied for calibration and correction in instrument transformer comparator belonging to industry.

A Study on The Design of The Self-Checking Comparator Using Time Diversity (시간 상이점을 이용한 자체 검진 비교기의 설계에 관한 연구)

  • 신석균;양성현;이기서
    • Proceedings of the KSR Conference
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    • 1998.11a
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    • pp.270-279
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    • 1998
  • This paper presents the design of self-checking comparator using the time diversity and the application to 8 bit CPU for the implementation of fault tolerant computer system. this self-checking comparator was designed with the different time Points in which temporary faults were raised by electrical noise between duplicated functional blocks. also this self-checking comparator was simulated in the method of the fault injection using 4 bit shift register counter. we designed the duplicated Emotional block and the self-checking comparator in the single chip using the Altera EPLD and could verify the reliability and the fault detection coverage through the modeling of temporary faults ,especially intermittent faults. at the results of this research, the reliability and the fault detection coverage were implemented through the self-checking comparator using the time diversity.

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Absolute Evaluation of Inductor Using Current Transformer Comparator (전류변성기 비교기를 이용한 인덕터의 절대 평가)

  • Kim, Yoon-Hyoung;Jung, Jae-Kap;Han, Sang-Gil;Kim, Han-Jun;Han, Sang-Ok
    • The Transactions of the Korean Institute of Electrical Engineers P
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    • v.57 no.3
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    • pp.279-284
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    • 2008
  • We have developed two absolute evaluation technology of inductor using current transformer (CT) comparator. One is the method that the reactance of inductor is obtained by analysing the equivalent circuit of CT with inductor connected to series at secondary terminal of CT. The other is the method that the reactance of inductor is obtained by comparing phase displacement of current flowing on inductor by using CT comparator. These technologies have the advantage to apply up to rated current and voltage of inductor. The method was applied to inductors under test in the range of $100 {\mu}H{\sim}1\;H$. The inductance of the inductor under test obtained in this study are consistent with those measured by LCR meter using the same inductor within an expanded uncertainty (k = 2) in the overall range of inductance.

An Improved Current Control Method for Three-Phase PWM Inverters Using Three-Level Comparator (3레벨 비교기를 이용한 3상인버터의 개선된 히스테리시스 전류제어 기법)

  • Moon, Hyoung-Soo;Han, Woo-Yong;Lee, Chang-Goo;Sin, Dong-Yong;Kim, Mu-Youn
    • Proceedings of the KIEE Conference
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    • 2001.07b
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    • pp.1035-1037
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    • 2001
  • This paper presents an improved hys- teresis current control method for three-phase PWM power inverters using 3-level comparator. Hysteresis current controller using 3-level comparator has an advantage of constant switching frequency compared with conventional hysteresis current controller. However, this method has disadvantage that the longer sampling period, the larger current error because the switching is performed without considering current error magnitude of each phase. The proposed method improves the control performance by selecting the optimum switching pattern in which the magnitudes of current errors are considered introducing space vector concept. Simulation results using Matlab/Simulink show that the proposed control method reduces current error keeping the merit of previous hysteresis current control method.

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A Single Comparator Method Using Reactor Neutron and Its Errors (원자로 중성자를 이용한 단일 비교체법과 오차)

  • Nak Bae Kim;Keung Shik Park;Hae-Ill Bak
    • Nuclear Engineering and Technology
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    • v.18 no.2
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    • pp.85-91
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    • 1986
  • A single comparator method with its accuracy has been studied for determining multielement by reactor neutron activation analysis. Spectral index at the irradiation position of each sample was determined using two flux monitors of Au and Co, one of which was used as a single comparator. The uncertainties of nuclear data related to the method were investigated for 18 elements and the error of the analytical result due to the uncertainties of nuclear data related is found to be less than 6%. The analytical results of 4 USGS reference samples agree well within 15% deviation with the results evaluated by USGS.

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