• 한국진공학회:학술대회논문집
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• 한국진공학회 2011년도 제40회 동계학술대회 초록집
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• pp.41-41
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• 2011

Flash memory에서 tunnel oxide film은 electron tunnelling 현상을 이용하여 gate에 전하를 전달하는 통로로 사용되고 있다. 특히, tunnel oxide film 내부의 charge trap 현상과 불순물이 소자 특성에 직접적인 영향을 주고 있어, 후속 N2O/NO 열처리 공정에서 SiO2/Si 계면에 nitrogen을 주입하여 tunnel oxide film 특성을 개선하고 있다. 따라서 N2O/NO 열처리 공정 최적화를 위해서는 tunnel oxide film 내 N 농도와 분포에 대한 정확한 평가가 필수적이다[1]. 본 실험에서는 low energy magnetic SIMS를 이용하여 N2O로 열처리된 tunnel oxide film 내의 N농도를 보다 정확하게 평가하고자 하였다. 사용된 시료는 Si substrate에 oxidation 이후 N2O 열처리를 진행하여 tunnel oxide를 형성시켰으며, 분석 impact energy는 surface effect최소화와 최상의 depth resolution 확보를 위해 250eV를 사용하였으며, matrix effect와 mass interference를 방지하기 위해 MCs+ cluster mode[2]로 CsN signal를 검출하였다. 실험 결과, 특정 primary beam 입사각도에서 nitrogen depth resolution 저하 현상이 발생하였고, SIMS crater 표면이 매우 거칠게 나타났다. 이에, Depth resolution 저하 현상을 개선하기 위해 극한의 glancing 입사각 조건으로 secondary extraction voltage 변화를 통해 depth resolution이 개선되는 최적의 impact energy와 primary beam 입사각 조건을 확보하였다. 그 결과 nitrogen의 depth resolution은 1.6nm의 depth resolution을 확보하였으며, 보다 정확한 N 농도와 분포를 평가할 수 있게 되었다.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 1994년도 춘계학술대회 논문집
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• pp.116-119
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• 1994

The characteristics of the Si-SiO$_2$ interface and the degradation in the short channel(L${\times}$W=1.7$\mu\textrm{m}$${\times}$15$\mu\textrm{m}$) SONOSFET nonvolatile memory devices, fabricated on the basis of the existing n-well CMOS processing technology for 1 Mbit DRAM with the 1.2$\mu\textrm{m}$ m design rule, were investigated using the charge pumping method. The SONOSFET memories have the tripple insulated-gate consisting of 30${\AA}$ tunneling oxide 205${\AA}$ nitride and 65${\AA}$ blocking oxide, The acceleration method which square voltage pulses of t$\_$p/=10msec, Vw=+19V and V$\_$E/=-22V continue to be alternatly applied to gale, was used to investigate the degradation of SONOSFET memories with the write/erase cycle. The degradation characteristics were ascertained by observing the change in the energy and spatial distributions of the interface trap density.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2008년도 추계학술대회 논문집 Vol.21
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• pp.122-122
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• 2008

Recently, Metal/Alumina/Silicon-Nitride/Silicon-Oxide/Silicon (MANOS) structures are one of the most attractive candidates to realize vertical scaling of high-density NAND flash memory [1]. However, as ANO layers are miniaturized, negative and positive bias temperature instability (NBTI/PBTI), such as the flat band voltage shift, ${\Delta}V_{FB}$, the interfacial trap density increase, ${\Delta}D_{it}$, the gate leakage current, ${\Delta}I_G$. and the retention characteristics, in MONOS capacitors, becomes an important issue in terms of reliability. It is well known that tunnel oxide degradation is a result of the oxide and interfacial traps generation during FN (Fowler-Nordheim) stress [2]. Because the bias temperature stress causes an increase of both interfacial-traps and fixed oxide charge could be a factor, witch can degrade device reliability during the program and erase operation. However, few studies on NBTI/PBTI have been conducted on improving the reliability of MONOS devices. In this work, we investigate the effect of post-annealing gas on bias temperature instability (BTI), such as the flat band voltage shift, ${\Delta}V_{FB}$, the interfacial trap density shift, ${\Delta}I_G$ retention characteristics, and the gate leakage current characteristics of MANOS capacitors. MANOS samples annealed at $950^{\circ}C$ for 30 s by a rapid thermal process were treated via additional annealing in a furnace, using annealing gases $N_2$ and $N_2-H_2$ (2 % hydrogen and 98 % nitrogen mixture gases) at $450^{\circ}C$ for 30 min. MANOS samples annealed in $N_2-H_2$ ambient had the lowest flat band voltage shift, ${\Delta}V_{FB}$ = 1.09/0.63 V at the program/erase state, and the good retention characteristics, 123/84 mV/decade at the program/erase state more than the sample annealed at $N_2$ ambient.