• Journal of Communications and Networks
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• v.18 no.3
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• pp.420-428
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• 2016

In this paper, we investigate the scheduling and power allocation for coordinated multi-point transmission in downlink long term evolution advanced (LTE-A) systems, where orthogonal frequency division multiple-access is used. The proposed scheme jointly optimizes user selection, power allocation, and modulation and coding scheme (MCS) selection to maximize the weighted sum throughput with fairness consideration. Considering practical constraints in LTE-A systems, the MCSs for the resource blocks assigned to the same user need to be the same. Since the optimization problem is a combinatorial and non-convex one with high complexity, a low-complexity algorithm is proposed by separating the user selection and power allocation into two subproblems. To further simplify the optimization problem for power allocation, the instantaneous signal-to-interference-plus-noise ratio (SINR) and the average SINR are adopted to allocate power in a single cell and multiple coordinated cells, respectively. Simulation results show that the proposed scheme can improve the average system throughput and the cell-edge user throughput significantly compared with the existing schemes with limited feedback.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.7 no.7
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• pp.1393-1398
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• 2003

In this paper, we propose a new switch architecture with one schedule at k-time slots, which k means the allocated time slots for each schedule. A conventional switch system uses a single time slot per each schedule but the proposed switch system uses multiple time slots per each schedule. Both the conventional switch md the proposed switch have same throughput but our switch system occupies multiple cell time slots per each schedule and hence can be implemented in scheduler of simple circuitry compared to the conventional switch. The proposed scheduling method for switch system will be applicable in switch system with high-speed data link rate.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.36 no.3A
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• pp.259-266
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• 2011

Femtocells are expected as the surest way to increase the system capacity with higher-quality links and more spatial reuse in future networks. In spite of their great potential, the system capacity is highly susceptible to network density because a large portion of users are exposed to inter-cell interference (ICI). In this work, we proposed a dynamic interference avoidance scheme in densely deployed cell environments. Our proposed DDIA (Distributed Dynamic ICI Avoidance) scheme not only works in a fully distributed manner, but also controls interference link connectivity of users with high agility so that it is suited for self-organizing networks (SONs). We introduced the concept of ICI-link and two-tier scheduling in designing the DDIA scheme. To avoid ICI without any central entity, our scheme tries to harmonize all base stations (BSs) with users adaptively. Through extensive simulations, it was shown that our proposed scheme improves the throughput of users by more than twice on average compared to the frequency reuse factor 1 scheme, who are exposed to ICI while maintaining or even improving overall network performance. Our scheme operates well regardless of network density and topology.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.24 no.12A
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• pp.1922-1931
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• 1999

A multicast traffic’s feature is the function of providing a point to multipoints cell transmission, which is emerging from the main function of ATM switch. However, when a conventional point-to-point switch executes a multicast function, the excess load is occurred because unicast cell as well as multicast cell passed the copy network. Additionally, due to the excess load, multicast cells collide with other cells in a switch. Thus a deadlock that losses cells raises, extremely diminishes the performance of switch. An input queued switch also has a defect of the HOL (Head of Line) blocking that less lessens the performance of the switch. In the proposed multicast switch, we use shared memory switch to reduce HOL blocking and deadlock. In order to decrease switch’s complexity and cell's processing time, to improve a throughput, we utilize the method that routes a cell on a separated paths by traffic pattern and the scheduling algorithm that processes a maximum 2N cell at once in the control part. Besides, when cells is congested at an output port, a cell loss probability increases. Thus we use the Output Memory (OM) to reduce the cell loss probability. And we make use of the method that stores the assigned memory (UM, MM) with a cell by a traffic pattern and clears the cell of the Output memory after a fixed saving time to improve the memory utilization rate. The performance of the proposed switch is executed and compared with the conventional policy under the burst traffic condition through both the analysis based on Markov chain and simulation.

• Journal of Korean Institute of Industrial Engineers
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• v.21 no.1
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• pp.137-151
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• 1995

A difficult problem in operating Flexible Manufacturing Systems (FMS) is to control the system in real-time by coordinating heterogeneous machines and integrating distributed information. The objective of the paper is to present the models and methodologies useful to resolve the difficult problem. The detailed objectives can be described in three folds. First, a hierarchical Colored and Timed Petri-Net (CTPN) is designed to control an FMS in real-time. The concerned FMS consists of a loading station, several machining cells, a material handling system, and an unloading station. Timed-transitions are used to represent the timed-events such as AGV movements between stations and cells, part machining activities in the cells. Signal places are also used to represent communication status between the host and the cell controllers. To resolve the event conflicts and scheduling problems, dispatching rules are introduced and applied. Second, an implementation methodology used to monitor and diagnose the errors occurring on the machines during system operation is proposed. Third, a Petri-Net simulator is developed to experiment with the designed control logic.

• Proceedings of the Korea Contents Association Conference
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• 2004.11a
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• pp.339-343
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• 2004

In this paper, we propose a cell scheduling scheme which can improve the fairness and the goodput through the traffic control in GFR service. For the evaluation of the proposed scheme, we compare the proposed scheme with the existing scheme in the fairness and the goodput. Simulation results show that proposed scheme can improve the fairness and goodput comparing with the existing buffer management scheme.

• The Transactions of the Korean Institute of Electrical Engineers
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• v.39 no.4
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• pp.414-427
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• 1990

This paper presents the development of the graphic simulator for an assembly workcell. The assembly workcell consists of two PUMA 560 manipulators, a conveyor belt system, a work table, and a vision sensor. In this study, the Petri Net theory is applied to model the assembly workcell and to construct the simulator. The event scheduling approach is used to simulate the cell. In order to show the graphic display of the simulation process, robot modelling, component modelling, and world modelling are included. The developed simulator is used to display the transition of the system state during the simulation. It is also used as a tool in selection the best resource states by studying the performance of the system as the resource states are changed.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 1998.11a
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• pp.472-482
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• 1998

오늘날의 통신서비스들은 음성이나 데이터 서비스와 같은 전통적인 서비스 뿐만 아니라 비디오 서비스와 같은 대량의 데이터를 전송해야만 하는 멀티미디어 서비스를 포함한다. 이러한 요구를 수용하기 위해서 BISDN(Broadband Integated Digital Network)이 개발되었고 이의 기반 기술로 ATM이 채택되었다. 다양한 멀티미디어 응용들 중에서 VOD(Video On Demand), 화상회의 등은 데이터를 동시에 여러 목적지로 보내는 멀티캐스트 특성이 있다. 그러므로 멀티캐스트 능력은 멀티미디어 통신에서 매우 중요하다. 본 논문에서는 링망을 이용한 병렬 멀티캐스트 패킷스위치(Parallel Multicast Packet Switch with Ring Network: PMRN)에서의 분리된 HOL을 이용한 멀티캐스트 셀 스케줄링 기법을 제안한다. 이 기법은 입력버퍼의 앞단에 멀티캐스트 셀과 유니캐스트 셀을 위한 분리된 HOL을 두고 non-FIFO방식을 사용함으로서 입력버퍼 내에서 전송 가능한 멀티캐스트 셀과 유니캐스트 셀을 동시에 스케쥴링할 수 있도록 하여 입력버퍼 내에서의 지연을 감소시키고 링망과 일대일 연결 네트워크의 이용율을 높이며 스위치의 처리율을 높일 수 있다.

• Journal of the Korean Institute of Telematics and Electronics A
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• v.33A no.5
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• pp.155-164
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• 1996

The architecture of a programmable video codec IC is described that employs multiple vector processors in a single chip. The vector processors operate in parallel and communicate with one another through on-chip shared memories. A single scalar control processor schedules each vector processor independently to achieve real-tiem video coding with special vector instructions. With programmable interconnection buses, the proposed architecture performs multi-processing of tasks and data in video coding. Therefore, it can provide good parallelism as well as good programmability. especially, it can operate multithread video coding, which processes several independent image sequences simultaneously. We explain its scheduling, multithred video coding, and vector processor architectures. We implemented a prototype video codec with a 0.8um CMOS cell-based technology for the multi-standard videophone. This codec can execute video encoding and decoding simultaneously for the QCIF image at a frame rate of 30Hz.

• 한국전산유체공학회:학술대회논문집
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• 1998.11a
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• pp.153-159
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• 1998

The Newton-Krylov method on the unstructured grid flow solver using the cell-centered spatial discretization oi compressible Euler equations is presented. This flow solver uses the reconstructed primitive variables to get the higher order solutions. To get the quadratic convergence of Newton method with this solver, the careful linearization of face flux is performed with the reconstructed flow variables. The GMRES method is used to solve large sparse matrix and to improve the performance ILU preconditioner is adopted and vectorized with level scheduling algorithm. To get the quadratic convergence with the higher order schemes and to reduce the memory storage. the matrix-free implementation and Barth's matrix-vector method are implemented and compared with the traditional matrix-vector method. The convergence and computing times are compared with each other.