• 제목/요약/키워드: carbide wafer

검색결과 36건 처리시간 0.028초

SDB와 etch-back 기술에 의한 MEMS용 SiCOI 구조 제조 (Fabrication of SiCOI Structures Using SDB and Etch-back Technology for MEMS Applications)

  • 정수용;우형순;정귀상
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 2003년도 하계학술대회 논문집 Vol.4 No.2
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    • pp.830-833
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    • 2003
  • This paper describes the fabrication and characteristics of 3C-SiCOI sotctures by SDB and etch-back technology for high-temperature MEMS applications. In this work, insulator layers were formed on a heteroepitaxial 3C-SiC film grown on a Si(001) wafer by thermal wet oxidation and PECVD process, successively. The pre-bonding of two polished PECVD oxide layers made the surface activation in HF and bonded under applied pressure. The wafer bonding characteristics were evaluated by the effect of HF concentration used in the surface treatment on the roughness of the oxide and pre-bonding strength. Hydrophilic character of the oxidized 3C-SiC film surface was investigated by ATR-FTIR. The strength of the bond was measured by tensile strengthmeter. The bonded interface was also analyzed by SEM. The properties of fabricated 3C-SiCOI structures using etch-back technology in TMAH solution were analyzed by XRD and SEM. These results indicate that the 3C-SiCOI structure will offers significant advantages in the high-temperature MEMS applications.

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Recent Trend of Ultra-Pure Water Producing Equipment

  • Motomura, Yoshito
    • 한국막학회:학술대회논문집
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    • 한국막학회 1996년도 제4회 하계분리막 Workshop (초순수 제조와 막분리 공정)
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    • pp.121-147
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    • 1996
  • Since 1980, the water quality of ultra-pure water has been rapidly improved, and presently ultra-pore water producing equipment for 64Mbit is in operation. Table 1 shows the degree of integration of DRM and required water quality exlmple. The requirements of the ultra-pure water for 64Mbit are resistivity: 18.2 MQ/cm or higher, number of particulates: 1 pc/ml or less (0.05 $\mu$m or larger). bacteria count: 0.1 pc/l or less. TOC (Total Organic Carbon, index of organic snbstance) : 1ppb or less, dissolved oxygen: 5ppb or less, silica: 0.5ppb or less, heavy metal ions: 5ppb or less. The effect of metals on the silicon wafer has been well known, and recently it has been reported that the existence of organic substance in ultra-pure water is closely related to the device defect, drawing attention. It is reported that if organic substance sticks to the natural oxidation film, the oxide film remaims on the organic substance attachment in the hydrofluoric acid treatment (removal of natural oxidation film). The organic substance forms film on the silicon wafer, and harmful elements such as metals and N.P.S., components contained in the organic substance and the bad effect due to the generatinn of silicon carbide cannot be forgotten. In order to remove various impurities in raw water, many technological develoments (membrane, ion exchange, TOC removal, piping material, microanalysis, etc.) have been made with ultra-pure water producing equipment and put to practical use. In this paper, technologies put to practical use in recent ultra-pure vater producing equimeut are introduced.

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Characteristics of Ni/SiC Schottky Diodes Grown by ICP-CVD

  • Gil, Tae-Hyun;Kim, Han-Soo;Kim, Yong-Sang
    • KIEE International Transactions on Electrophysics and Applications
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    • 제4C권3호
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    • pp.111-116
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    • 2004
  • The Ni/SiC Schottky diode was fabricated with the $\alpha$-SiC thin film grown by the ICP-CVD method on a (111) Si wafer. $\alpha$-SiC film has been grown on a carbonized Si layer in which the Si surface was chemically converted to a very thin SiC layer achieved using an ICP-CVD method at $700^{\circ}C$. To reduce defects between the Si and $\alpha$-SiC, the surface of the Si wafer was slightly carbonized. The film characteristics of $\alpha$-SiC were investigated by employing TEM (Transmission Electron Microscopy) and FT-IR (Fourier Transform Infrared Spectroscopy). Sputterd Ni thin film was used as the anode metal. The boundary status of the Ni/SiC contact was investigated by AES (Auger Electron Spectroscopy) as a function of the annealing temperature. It is shown that the ohmic contact could be acquired beyond a 100$0^{\circ}C$ annealing temperature. The forward voltage drop at 100A/cm was I.0V. The breakdown voltage of the Ni/$\alpha$-SiC Schottky diode was 545 V, which is five times larger than the ideal breakdown voltage of the silicon device. As well, the dependence of barrier height on temperature was observed. The barrier height from C- V characteristics was higher than those from I-V.

화학 기계적 미세 가공기술에 의한 버 최소화에 관한 연구 (A Study on The Burr Minimization by The Chemical Mechanical Micro Machining(C3M))

  • 이현우;박준민;정상철;정해도;이응숙
    • 한국정밀공학회지
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    • 제18권12호
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    • pp.177-184
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    • 2001
  • C3M(chemical mechanical micro machining) is applied for diminishing the size of burr and fabricating the massless patterning for aluminium wafer(thickness of 1${\mu}m$). It is difficult to perform the micro size machining with the radically increased shear stress. While the miniaturization and function-orientation of parts has been needed in the many field such as electronics, optics and medicine. etc., it is not enough to satisfy the industry needs in the machining technology. In this paper feasibility test of diminishing burr and fabricating maskless pattern was experimented and analyzed. In the experiment oxide layer was farmed on the aluminium with chemical reaction by ${HNO_3}$(10wt%), then the surface was grooved with tungsten carbide tool for the different condition such as the load and fred rate. The result was compared with the conventional machining to show the improvement of C3M with SEM for burr diminish and XPS for atomic existence, AFM for more precise image.

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CMP 패드 컨디셔너의 제조공법에 따른 패드 컨디셔닝 특성 (The properties of pad conditioning according to manufacturing methods of CMP pad conditioner)

  • 강승구;송민석;지원호
    • 한국정밀공학회:학술대회논문집
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    • 한국정밀공학회 2005년도 추계학술대회 논문집
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    • pp.362-365
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    • 2005
  • Currently Chemical Mechanical Planarization (CMP) has become an essential step in the overall semiconductor wafer fabrication technology. Especially the CMP pad conditioner, one of the diamond tools, is required to have strong diamond retention. Strong cohesion between diamond grits and metal matrix prevents macro scratch on the wafer. If diamond retention is weak, the diamond will be pulled out of metal matrix. The pulled diamond grits are causative of macro scratch on wafer during CMP process. Firstly, some results will be reported of cohesion between diamond grits and metal matrix on the diamond tools prepared by three different manufacturing methods. A measuring instrument with sharp cemented carbide connected with a push-pull gauge was manufactured to measure the cohesion between diamond grits and metal matrix. The retention force of brazed diamond tool was stronger than the others. The retention force was also increased in proportion to the contact area of diamond grits and metal matrix. The brazed diamond tool has a strong chemical combination of the interlayer composed of chrome in metal matrix and carbon which enhance the interfacial cohesion strength between diamond grits and metal matrix. Secondly, we measured real-time data of the coefficient of friction and the pad wear rate by using CMP tester (CETR, CP-4). CMP pad conditioner samples were manufactured by brazed, electro-plated and sintered methods. The coefficient of friction and the pad wear rate were shown differently according to the arranged diamond patterns. Consequently, the coefficient of friction is increased according as the space between diamonds is increased or the concentration of diamonds is decreased. The pad wear rate is increased according as the degree of diamond protrusion is increased.

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다이아몬드 코팅 와이어로 가공된 태양전지용 실리콘 웨이퍼의 표면 특성에 관한 연구 (A study on the surface characteristics of diamond wire-sawn silicon wafer for photovoltaic application)

  • 이경희
    • 한국결정성장학회지
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    • 제21권6호
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    • pp.225-229
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    • 2011
  • 현재 결정질 태양전지에서 웨이퍼 가공은 대부분 슬러리 분사 방식의 다중 와이어를 이용한 방법이 사용되고 있다. 이와 같은 슬러리 분사 방식의 웨이퍼 가공은 가공속도가 낮아 생산성이 떨어지는 단점이 있을 뿐만 아니라 금속 재질의 와이어와 실리콘 블록의 직접적인 마찰에 의하여 웨이퍼 표면의 금속 불순물에 의한 오염이 발생되는 단점이 있다. 뿐만 아니라 와이어와 실리콘 블록간의 직접적인 마찰로 인하여 와이어가 빨리 마모되며, 이로 인하여 일회성의 와이어를 사용하게 되면서 제조원가는 상승하게 된다. 반면에 다이아몬드 입자가 코팅된 와이어를 이용하여 실리콘 웨이퍼를 가공하게 되면, 가공속도가 기존 슬러리 분사방식보다 빠르며, 공정진행에 따른 와이어의 마모율이 적어 와이어의 재사용에 의한 제조원가 절감이 가능하다. 따라서 이와 같은 다이아몬드 입자가 코팅된 와이어를 이용하여 가공하는 기술은 슬러리 분사방식에 비하여 더 효율적이라 할 수 있다. 본 연구에서는 슬러리 분사방식으로 가공된 웨이퍼와 다이아몬드 코팅된 와이어로 가공된 웨이퍼의 표면특성에 대하여 분석하고 셀 공정에 영향을 미치는 것에 대하여 설명하고자 한다. 또한, 다이아몬드 와이어로 가공된 웨이퍼를 활용하기 위한 셀 공정의 개선방향에 대하여 제안하고자 한다.

정밀연삭기의 전해드레싱 시스템 개발사례 (Development of Grinding Dressing System by Using Inprocess Electrelytic Dressing)

  • 김정두
    • 한국공작기계학회:학술대회논문집
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    • 한국공작기계학회 1998년도 춘계학술대회 논문집
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    • pp.196-202
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    • 1998
  • Recently, developments in the frontier industry have brought a rapid increase in the use of brittle materials such as silicon wafer, ferrite, sintered carbide, MgO single crystal and die steel. Because of high hardness and brittleness the cracking and chipping are apt to generate in the grinding of brittle materials, but have replaced gradually the high precision grinding. In this study, the optimum system of in-process electrolytic dressing controlled by computer was developed for improving the defects, and could maintain the optimum dressing condition at all times. The control of in-process dressing was simplified using this system, was able to maintain a stable dressing current and was unrelated to the change of dressing condition according to the variation of gap and oxide layer. Therefore, the optimum in-process electrolytic dressing system was constructed and the analysis of grinding mechanism with this system was studied.

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Ni/AlN/4H-SiC 구조로 제작된 소자의 후열처리 효과 (The Effect of Post-deposition Annealing on the Properties of Ni/AlN/4H-SiC Structures)

  • 민성지;구상모
    • 전기전자학회논문지
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    • 제24권2호
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    • pp.604-609
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    • 2020
  • 본 연구에서는 RF 스퍼터를 이용하여 SiC 기판위에 AlN막을 증착하고 급속 열처리 (RTA) 공정의 온도에 따른 AlN/4H-SiC 구조의 전기적, 재료적 특성에 대한 영향을 분석하였다. 400도에서 RTA 공정을 진행한 Ni/AlN/4H-SiC SBD 소자의 온/오프 비율은 RTA 공정 전 그리고 600도에서 RTA 공정을 한 소자에 비해 약 10배정도 높은 값을 가졌다. 또한 오제이 전자현미경을 통한 원자성분 분석을 통해 증착한 AlN 층내의 존재하는 산소의 양이 후열 처리 조건에 따라 변화함을 확인하였고 소자의 온/오프 비율 그리고 온-저항 등 소자의 성능에 영향을 주는 것을 분석하였다. 추가적으로, 제작한 소자의 노출된 음향 주파수에 따른 전기적 특성변화를 분석하였다.

Field Oxide를 이용한 고전압 SiC 쇼트키 diode 제작 (Fabrication of SiC Schottky Diode with Field oxide structure)

  • 송근호;방욱;김상철;서길수;김남균;김은동;박훈수
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 2002년도 하계학술대회 논문집
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    • pp.350-353
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    • 2002
  • High voltage SiC Schottky barrier diodes with field plate structure have been fabricated and characterized. N-type 4H-SiC wafer with an epilayer of ∼10$\^$15/㎤ doping level was used as a starting material. Various Schottky metals such as Ni, Pt, Ta, Ti were sputtered and thermally-evaporated on the low-doped epilayer. Ohmic contact was formed at the backside of the SiC wafer by annealing at 950$^{\circ}C$ for 90 sec in argon using rapid thermal annealer. Field oxide of 550${\AA}$ in thickness was formed by a wet oxidation process at l150$^{\circ}C$ for 3h and subsequently heat-treated at l150$^{\circ}C$ for 30 min in argon for improving oxide quality. The turn-on voltages of the Ni/4H-SiC Schottky diode was 1.6V which was much higher than those of Pt(1.0V), Ta(0.7V) and Ti(0.7). The voltage drop was measured at the current density of 100A/$\textrm{cm}^2$ showing 2.1V for Ni Schottky diode, 1.45V for Pt 1.35V, for Ta, and 1.25V for Ti, respectively. The maximum reverse breakdown voltage was measured 1100V in the file plated Schottky diodes with 101an thick epilayer.

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폐 반도체 슬러리 및 폐 망간전지 흑연봉으로부터 탄화규소 합성 (Synthesis of SiC from the Wire Cutting Slurry of Silicon Wafer and Graphite Rod of Spent Zinc-Carbon Battery)

  • 손용운;정인화;손정수;김병규
    • 자원리싸이클링
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    • 제12권3호
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    • pp.25-30
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    • 2003
  • 본 연구의 목적은 실리콘웨이퍼의 절단공정에서 발생한 폐슬러리와 폐망간전지에서 발생하는 흑연봉을 각각 규소 및 탄소의 출발물질로 사용하여 가스터빈 부품, 열교환기 등에 사용되는 탄화규소(SiC)를 합성하는 연구를 수행하였다. 실리콘웨이퍼의 절단공정에서 발생하는 폐슬러리로부터 비중차이에 의한 선별과 자력선별 등에 의해 정제된 규소와 탄화규소를 얻을 수 있었으며, 폐망간전지를 해체하여 얻은 탄소봉으로부터 수세와 분쇄를 통하여 탄소분말을 얻을 수 있었다. 탄화규소의 합성은 규소와 당량비의 탄소분발을 혼합하여 1$600^{\circ}C$이상의 온도에서 아르곤 분위기와 진공분위기 하에서 2시간 유지시켰을 때 이루어졌으며, 이때 합성된 탄화규소의 순도는 99% 이상이었다.