• Title/Summary/Keyword: bus interface

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Reactive Reserve based Contingency Constrained Optimal Power Flow to Enhance Interface Flow Limits in Terms of voltage Stability

  • Hwachang Song;Lee, Byongjun
    • KIEE International Transactions on Power Engineering
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    • v.11A no.4
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    • pp.27-32
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    • 2001
  • This paper presents a concept of reactive reserve based contingency constrained optimal power flow (RCCOPF). RCCOPF for enhancement of interface flow limit is composed of two modules, which are the modified continuation power flow (MCPF) and reactive optimal power flow (ROPF). In RCCOPF, two modules are repeatedly performed to increase interface flow margins of selected contingent states until satisfying the required enhancement of interface flow limit. In numerical simulation, a simple example with New England 39-bus test system is shown.

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Rapid Implementation of the MAC and Interface Circuits fot the Wireless LAN Cards Using FPGA

  • Jiang, Songchar
    • Journal of Communications and Networks
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    • v.1 no.3
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    • pp.201-212
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    • 1999
  • This paper studies the rapid design and implementation of the medium access control(MAC) and related interface circuits for 802.11 wireless LANs based on the field programmed gate ar-ray(FPGA) technology. Our design is thus aimed to support both the distributed coordination function (DCF) and the point coordination function(PCF) with the aid of FPGA technology. Further-more, in an infrastructure network, some stations may serve as the access points (APs) which may function like a learning bridge. This paper will also discuss how to design for such application. The hardware of the MAC and interface may at least consist of three major parts: wireless transmission and reception processes and in-terface, host(bus) interface, and the interface to the distributed system (optional). Through the increasing popularity of FPGA de-sign, this paper presents how Complex Programmable Logic De-vices(CPLD) can be utilized for speedy design of prototypes. It also demonstrates that there is much room for low-cost hardware prototype design to accelerate the processing speed of the MAC control function and for field testing.

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Thermal Stress Analysis of Drums Brakes by Finite Element Method (유한요소법에 의한 드럼 브레이크의 열응력 해석)

  • Goo, Byeong-Choon;Seo, Jung-Won
    • Proceedings of the KSME Conference
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    • 2001.06a
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    • pp.831-836
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    • 2001
  • In the case of axisymmetric thermal analysis of drum brakes, the distribution of frictional heat produced on the interface and temperature difference between mating frictional faces are very interesting problems to computational researchers. In this paper, heat conduction from the interface to the pad and the drum was modeled by using a thin interface element, so artificial division of the generated frictional heat between pad and drum is not necessary. Temperature difference between mating frictional faces is successfully modeled by using the interface element. The influence of some parameters on tile thermal stress was checked. The analysis was performed by ABAQUS/Standard code.

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Control and acquisition system for USN sensors (USN 센서 제어 및 정보 취득 시스템)

  • Nam, Seung-Hyun
    • Journal of Sensor Science and Technology
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    • v.18 no.6
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    • pp.409-416
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    • 2009
  • A lot of valuable-piece of information are acquisited through ubiquitous sensor network(USN) system composed of man-made sensors. The telemetry system used for communicating to access informations between nature and human-beings monitors and estimates the status of infrastructure, utilities and natural environments to prevent hidden disasters, improving quality of life and productivity in multi-directional views. That would be the reason of USN subsistence. This paper will be a review on how to build long-term USN system. Therefore, this paper focuses on reviewing the sensor interface and the sensor network interface and its significance as the foundation stone for varying USN service profiles and showing its development example, and finally proposing a few of things to set up future-oriented USN open system.

A Study on Effects of SSSC Controllers on Interface Flow Limit (SSSC 투입에 따른 연계선로조류의 윤용한계 증대)

  • Song, Hwa-Chang;Lee, Byong-Jun;Kwon, Sae-Hyuk;Kim, Seul-Ki
    • The Transactions of the Korean Institute of Electrical Engineers A
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    • v.50 no.2
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    • pp.83-89
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    • 2001
  • This paper introduces a power flow model of SSSC for voltage stability analysis of power system installed with Static Synchronous Compensators. The SSSC model is obtained from the injection model of voltage source inverter by adding the condition that SSSC injection voltage is in quadrature with current of SSSC-installed branch. This model is incorporated into modified CPF algorithm to study effects of SSSC on the security-constrained interface flow limit. Determination of interface flow limit is simply briefed. In case study a 771-bus real system is used to show that interface flow limit can be improved by appropriate control of SSSC in terms of voltage stability.

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Reactive Reserve based Contingency Constrained Optimal Power Flow to Enhance Interface Flow Limits in Terms of Voltage Stability

  • Hwachang Song;Lee, Byongjun
    • KIEE International Transactions on Power Engineering
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    • v.11 no.X00
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    • pp.27-32
    • /
    • 2001
  • This paper presents a concept of reactive reserve based contingency constrained optimal power flow (RCCOPF). RCCOPF for enhancement of interface flow limit is composed of two modules, which are the modified continuation power flow (MCPF) and reactive optimal power flow (ROPF). In RCCOPF, two modules are repeatedly performed to increase interface flow margins of selected contingent states until satisfying the required enhancement of interface flow limit. In numerical simulation, a simple example with New England 39-bus test system is shown.

Thermoelastic Contact Analysis of Drums Brakes by Finite Element Method (유한요소법에 의한 드럼 브레이크의 열탄성 접촉해석)

  • 구병춘;서정원
    • Transactions of the Korean Society of Automotive Engineers
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    • v.9 no.3
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    • pp.173-180
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    • 2001
  • In the case of axisymmetric thermal analysis of drum brakes, the distribution of frictional heat produced on the interface and temperature difference between mating frictional faces are very interesting problems to computational researchers. In the first part, the influence of the s-cam load angles and elastic modulus of the pad on the contact pressure distribution between pad and drum was checked by a three dimensional model. In the second part heat conduction from the interface to the pad and the drum was modeled by using a thin interface element, so artificial division of the generated frictional heat between pad and drum is not necessary. Temperature difference between mating frictional faces is successfully modeled by using the interface element. The influence of some parameters on the thermal distribution is checked. The analysis was performed by ABAQUS/Standard code.

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Bus Voltage Drop Analysis Caused by Payload Operation of LEO Satellite (저궤도 인공위성 탑재체 구동에 따른 버스 전압 강하 해석)

  • Park, Hee-Sung;Jang, Jin-Baek;Park, Sung-Woo;Lee, Sang-Kon
    • Aerospace Engineering and Technology
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    • v.9 no.2
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    • pp.57-62
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    • 2010
  • SAR payload of LEO satellite will consume about 150A current. This high current makes the voltage drop between battery, satellite main bus and payload interface, which cannot guarantee the input voltage level of the satellite electrical unit and payload. So, it is necessary to predict the main bus and payload input voltage level when the payload works. In this paper, the worst case analysis of the harness and contact resistance was executed and predicted the voltage drop when the payload works.

Design and Implementation of a PCI-based Parallel Fuzzy Inference System (PCI 기반 병렬 퍼지추론 시스템과 설계 및 구현)

  • 이병권;이상구
    • Journal of the Korean Institute of Intelligent Systems
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    • v.11 no.8
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    • pp.764-770
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    • 2001
  • In this paper, we propose a novel PCI bus based parallel fuzzy inference system for transferring and inferencing the large volumes of fuzzy data in high speed. For this, the PCI 9050 interface chip is used to connect a local bus design as a PCI target core using FPGA to the PCI bus. We design and implement the PCI target core by using VHDL to be processed in parallel by considering the points of parallelyzing each element of the membership functions and each block of the condition and/or consequent parts. The proposed system can be used in a system requiring a rapid inference time in a real-time system or pattern recognition on the large volume of satellite images that have many inference variables in the condition and consequent parts.

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Enhancement of Interface Flow Limit using Static Synchronous Series Compensator(SSSC) (SSSC 투입에 따른 연계선로의 송전운용한계 개선)

  • Kim, Seul-Ki;Song, Hwa-Chang;Lee, Byong-Jun;Kwon, Sae-Hyuk;Chang, Byung-Hoon
    • Proceedings of the KIEE Conference
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    • 2000.07a
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    • pp.28-30
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    • 2000
  • This paper introduces a power flow model of SSSC for voltage stability study. The SSSC model is obtained from the injection model of voltage source inverter by adding the condition that SSSC injection voltage is in quadrature with current of SSSC-installed branch. This model is incorporated into modified CPF algorithm to study effects of SSSC on the security-constrained interface flow limit. Determination of interface flow limit is simply briefed. In case study a 771-bus real system is used to show that SSSC can improve interface flow limit in terms of voltage stability.

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