• Korean Journal of Metals and Materials
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• v.49 no.5
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• pp.411-418
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• 2011

The current study investigates the electroplating characteristics of Sn-Cu eutectic micro-bumps electroplated on a Si chip for flip chip application. Under bump metallization (UBM) layers consisting of Cr, Cu, Ni and Au sequentially from bottom to top with the aim of achieving Sn-Cu bumps $10\times10\times6$ ${\mu}m$ in size, with 20${\mu}m$ pitch. In order to determine optimal plating parameters, the polarization curve, current density and plating time were analyzed. Experimental results showed the equilibrium potential from the Sn-Cu polarization curve is -0.465 V, which is attained when Sn-Cu electro-deposition occurred. The thickness of the electroplated bumps increased with rising current density and plating time up to 20 mA/$cm^2$ and 30 min respectively. The near eutectic composition of the Sn-0.72wt%Cu bump was obtained by plating at 10 mA/$cm^2$ for 20 min, and the bump size at these conditions was $10\times10\times6$ ${\mu}m$. The shear strength of the eutectic Sn-Cu bump was 9.0 gf when the shearing tip height was 50% of the bump height.

• Journal of the Microelectronics and Packaging Society
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• v.30 no.3
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• pp.1-10
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• 2023

Recently, as the demand for high-performance computers and mobile products increases, semiconductor packages are becoming high-integration and high-density. Therefore, in order to transmit a large amount of data at once, micro bumps such as flip-chip and Cu pillar that can reduce bump size and pitch and increase I/O density are used. However, when the size of the bumps is smaller than 70 ㎛, the brittleness increases and electrical properties decrease due to the rapid increase of the IMC volume fraction in the solder joint, which deteriorates the reliability of the solder joint. Therefore, in order to improve these issues, a layer that serves to prevent diffusion is inserted between the UBM (Under Bump Metallization) or pillar and the solder cap. In this review paper, various studies to improve bonding properties by suppressing excessive IMC growth of micro-bumps through additional layer insertion were compared and analyzed.

• ETRI Journal
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• v.32 no.2
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• pp.342-344
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• 2010

A novel, maskless, low-volume bumping material, called solder bump maker, which is composed of a resin and low-melting-point solder powder, has been developed. The resin features no distinct chemical reactions preventing the rheological coalescence of the solder, a deoxidation of the oxide layer on the solder powder for wetting on the pad at the solder melting point, and no major weight loss caused by out-gassing. With these characteristics, the solder was successfully wetted onto a metal pad and formed a uniform solder bump array with pitches of 120 ${\mu}m$ and 150 ${\mu}m$.

• Journal of Welding and Joining
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• v.25 no.2
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• pp.76-81
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• 2007

Solder bumps have been used to interconnect the chip and substrate, and the size of the solder bump decreases below $100{\mu}m$ to accommodate higher packaging density. In order to fabricate solder bumps, a mold to chip transfer process is suggested in this work. Since the thin stainless steel mold is not wet by the solder, the molten solder is forced to fill the mold cavities with ultrasonic vibration. The solders within the mold cavities are transferred to the Cu pads on the polyimide film through reflow soldering.

• Journal of the Korean institute of surface engineering
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• v.28 no.2
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• pp.67-76
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• 1995

The microstructure of 95wt.%Pb/5wt.%Sn and 63wt.%Sn/37wt.%Pb solders for flip chip bonding process has been characterized. Solders were deposited by thermal evaporation and reflowed in the conventional furnace or by rapid thermal annealing(RTA) process. As-deposited films show columnar structure. The microstructure of furnace cooled 63Sn/37Pb solder shows typical lamellar form, but that of RTA treated solder has the structure showing an uniform dispersion of Pb-rich phase in Sn matrix. The grain size of 95Pb/5Sn solder reflowed in the furnace is about $5\mu\textrm{m}$, but the grain size of RTA treated solder is too small to be observed. The microstructure in 63Sn/37Pb solder bump shows the segregation of Pb phase in the Sn rich matrix regardless of reflowing method. The 63Sn/37Pb solder bump formed by RTA process shows more uniform microstructure. These result are related to the heat dissipation in the solder bump.

• Communications of the Korean Mathematical Society
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• v.12 no.2
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• pp.479-490
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• 1997

We consider long nonlinear waves in the two-layer flow of an inviscid and incompressible fluid bounded above by a free surface and below by a rigid boundary. The flow is forced by a bump on the bottom. The derivation of the forced KdV equation fails when the density ratio h and the depth ratio $\rho$ yields a condition $1 + h\rho = (2-h)((1-h)^2 + 4\rho h)^{1/2}$. To overcome this difficulty we derive a forced modified KdV equation by a refined asymptotic method. Numerical solutions are given and hydraulic fall solution of a two layer fluid is expressed analytically in the case that derivation of the forced KdV (FKdV) equation fails.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.18 no.9
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• pp.798-802
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• 2005

The plating shape in the opening of photoresist becomes gradated shape in the fountain plating system, because bubbles from the wafer surface are difficult to escape from the deep openings, vias. In this paper, the bubble flow from the wafer surface during plating process was studied and we designed the tilted electrode ring to get uniform bump height on all over the wafer and evaluated the film uniformity by SEM and $\alpha-step$. In a-step measurement, film uniformities in the fountain plating system and the tilted electrode ring contact system were $\pm16.6\%,\;\pm4\%$ respectively.

• 한국정보디스플레이학회:학술대회논문집
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• 2003.07a
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• pp.1005-1008
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• 2003

We report a new FCOG (flip chip on glass) technique using solder bumps for display packaging applications. The In and Sn solder bumps of 40 ${\mu}m$ pitches were formed on Si and glass substrate. The In and Sn bumps were bonded at 125 at the pressure of 3 mN/bump. The metallurgical bonding was confirmed using cross-sectional SEM. The contact resistance of the solder joint was 65 $m{\Omega}$ which was much lower than that of the joint made using the conventional ACF bonding technique. We demonstrate that the new COG technique using solder bump to bump direct bonding can be applied to advanced LCDs that lead to require higher quality, better resolution, and lower power consumption.

• 유체기계공업학회:학술대회논문집
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• 2001.11a
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• pp.469-474
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• 2001

The feasibility of a oil-free motor-driven two-stage centrifugal compressor supported by air bump bearings is investigated. This centrifugal compressor is driven by 75kW motor at an operating speed of 39,000RPM md a pressure ratio of the compressor is up to 4. The analysis is performed, based upon bearing equilibrium position, bearing stiffness, Campbell diagram, unbalance response and stability. It is demonstrated in this paper that air bump bearings can be adopted well to a oil-free motor-driven centrifugal compressor.

• 유체기계공업학회:학술대회논문집
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• 2001.11a
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• pp.129-134
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• 2001

The paper presents the optimal design of a oil-free two-stage compressor, which is driven by 75 kW motor at an operating speed of 39,000 rpm, and the pressure ratio of which is up to 4. First, an attempt is made to obtain the optimal design of a bump bearing which supports a compressor rotor. Second, bump bearings and shaft are considered simultaneously, and the weighted sum of rotor weight and frictional torque is minimized. Finally, the optimal geometry of compressor wheel is considered. The mean efficiency and the - minimum efficiency are maximized respectively. The results presented in this paper provide important design information necessary to reduce the energy loss.