• The Journal of Korean Institute of Communications and Information Sciences
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• v.29 no.11B
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• pp.911-919
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• 2004

IP address lookup is one of the essential functions on internet routers, and it determines overall router performance. The most important evaluation factor for software-based IP address lookup is the number of the worst case memory accesses. Binary prefix tree (BPT) scheme gives small number of worst case memory accesses among previous software-based schemes. However the tree structure of BPT is normally unbalanced. In this paper, we propose weighted binary prefix tree (WBP) scheme which generates nearly balanced tree, through combining the concept of weight to the BPT generation process. The proposed WBPT gives very small number of worst case memory accesses compared to the previous software-based schemes. Moreover the WBPT requires comparably small size of memory which can be fit within L2 cache for about 30,000 prefixes, and it is rather simple for prefix addition and deletion. Hence the proposed WBPT can be used for software-based If address lookup in practical routers.

• Journal of KIISE:Information Networking
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• v.32 no.4
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• pp.543-550
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• 2005

Demand for better services in the Internet has been increasing due to the rapid growth of the Internet, and hence next generation routers are required to perform intelligent packet classification. For a given classifier defining packet attributes or contents, packet classification is the process of identifying the highest priority rule to which a packet conforms. A notable characteristic of real classifiers is that a packet matches only a small number of distinct source-destination prefix pairs. Therefore, a lot of schemes have been proposed to filter rules based on source and destination prefix pairs. However, most of the schemes are based on sequential one-dimensional searches using trio which requires huge memory. In this paper, we proposea memory-efficient two-dimensional search scheme using source and destination prefix pairs. By constructing binary prefix tree, source prefix search and destination prefix search are simultaneously performed in a binary tree. Moreover, the proposed two-dimensional binary prefix tree does not include any empty internal nodes, and hence memory waste of previous trio-based structures is completely eliminated.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.29 no.1B
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• pp.18-28
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• 2004

Efficient hardware implementation of address lookup is one of the most important design issues of internet routers. Address lookup significantly impacts router performance since routers need to process tens-to-hundred millions of packets per second in real time. In this paper, we propose a practical IP address lookup structure based on the binary tree of prefixes of different lengths. The proposed structure produces multiple balanced trees, and hence it solve the issues due to the unbalanced binary prefix tree of the existing scheme. The proposed structure is implemented using pipelined binary search combined with a small size TCAM. Performance evaluation results show that the proposed architecture requires a 2000-entry TCAM and total 245 kbyte SRAMs to store about 30,000 prefix samples from MAE-WEST router, and an address lookup is achieved by a single memory access. The proposed scheme scales very well with both of large databases and longer addresses as in IPv6.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.33 no.5B
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• pp.285-295
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• 2008

Internet routers perform packet forwarding which determines a next hop for each incoming packet using the packet's destination IP address. IP address lookup becomes one of the major challenges because it should be performed in wire-speed for every incoming packet under the circumstance of the advancement in link technologies and the growth of the number of the Internet users. Many binary search algorithms have been proposed for fast IP address lookup. However, tree-based binary search algorithms are usually unbalanced, and they do not provide very good search performance. Even for binary search algorithms providing balanced search, they have drawbacks requiring prefix duplication. In this paper, a new binary search algorithm which provides the balanced binary search and the number of its entries is much less than the number of original prefixes. This is possible because of composing the binary search tree only with disjoint prefixes of the prefix set. Each node has a prefix vector that has the prefix nesting information. The number of memory accesses of the proposed algorithm becomes much less than that of prior binary search algorithms, and hence its performance for IP address lookup is considerably improved.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.31 no.2B
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• pp.71-79
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• 2006

Address lookup is an essential function in the Internet routers, and it determines overall router performance. In this paper, we have thoroughly investigated the binary-search-based address lookup algorithms and proposed a new algorithm based on binary search on prefix lengths. Most of the existing binary search schemes perform binary search on prefix values, and hence the lookup speed is proportional to the length of prefixes or the log function of the number of prefixes. The previous algorithm based on binary search on prefix lengths has superior lookup performance than others. However, the algorithm requires very complicated pre-computation of markers and best matching prefixes in internal nodes since naive binary search is not possible in their scheme. This complicated pre-computation makes the composition of the routing table and incremental update very difficult. By using leaf-pushing, the proposed algorithm in this paper removes the complicated pre-computation of the Previous work in performing the binary search on prefix lengths. The performance evaluation results show that the proposed scheme has very good performance in lookup speed compared with previous works.

• Journal of KIISE:Information Networking
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• v.36 no.1
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• pp.57-67
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• 2009

Packet forwarding in the Internet routers is to find out the longest prefix that matches the destination address of an input packet and to forward the input packet to the output port designated by the longest matched prefix. The IP address lookup is the key of the packet forwarding, and it is required to have efficient data structures and search algorithms to provide the high-speed lookup performance. In this paper, an efficient IP address lookup algorithm using binary search is investigated. Most of the existing binary search algorithms are not efficient in search performance since they do not provide a balanced search. The proposed binary search algorithm performs perfectly balanced binary search using switch pointers. The performance of the proposed algorithm is evaluated using actual backbone routing data and it is shown that the proposed algorithm provides very good search performance without increasing the memory amount storing the forwarding table. The proposed algorithm also provides very good scalability since it can be easily extended for multi-way search and for large forwarding tables

• Journal of KIISE:Information Networking
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• v.32 no.3
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• pp.427-432
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• 2005

Packet arrival rates in internet routers have been dramatically increased due to the advance of link technologies, and hence wire-speed packet processing in Internet routers becomes more challenging. As IP address lookup is one of the most essential functions for packet processing, algorithm and architectures for efficient IP address lookup have been widely studied. In this paper, we Propose an efficient I address lookup architecture which shows yeW good Performance in search speed while requires a single small-size memory The proposed architecture is based on multi-way tree structure which performs comparisons of multiple prefixes by one memory access. Performance evaluation results show that the proposed architecture requires a 280kByte SRAM to store about 40000 prefix samples and an address lookup is achieved by 5.9 memory accesses in average.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.46 no.5
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• pp.48-55
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• 2009

In this paper, We propose Adaptive Group Separation algorithm for efficient RFID system AGS algorithm determines the optimized initial prefix size j, and divides the group of. A reader requests the group and searches the tag ID. If a tag collision occurred, reader adds a one bit, '0' or '1' at first bit of collision point, As a result we observe that transmitted data bits and the recognition time are decreased. The proposed algorithms have been verified by computer simulation. The performance of the proposed anti-collision algorithm is evaluated in terms of the number of repetitions and the amount of transmission bits according to the in crease of the number of tags is 256. The AGS algorithm improve the number of repetitions by about 32.3% and reduce tile amount of the transmission bits by about 1/40 than slotted binary tree algorithm.

• Journal of Advanced Navigation Technology
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• v.19 no.4
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• pp.265-277
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• 2015

Automatic dependent surveillance-broadcast (ADS-B) is the core technology of communication, navigation and surveillance/air traffic management (CNS/ATM), automatically broadcasts its own position information using GNSS and has an advantage of lower geological constraints and faster update speed compared with legacy radar systems. EUROCONTROL defined all purpose structured eurocontrol surveillance information exchange (ASTERIX) CAT.021. ASTERIX CAT.021 is modified several times, but it has compatibility issues with previous version of it. In this paper, we have designed an efficient message processing module regardless of the version of ASTERIX CAT.021. This implemented module generates patterns to collect messages received from the network, after that, received messages are processed in the routine that is defined in accordance with the patterns.