• Title/Summary/Keyword: bandgap reference circuit

Search Result 36, Processing Time 0.023 seconds

A Low Voltage Bandgap Current Reference with Low Dependence on Process, Power Supply, and Temperature

  • Cheon, Jimin
    • Journal of Advanced Information Technology and Convergence
    • /
    • v.8 no.2
    • /
    • pp.59-67
    • /
    • 2018
  • The minimum power supply voltage of a typical bandgap current reference (BGCR) is limited by operating temperature and input common mode range (ICMR) of a feedback amplifier. A new BGCR using a bandgap voltage generator (BGVG) is proposed to minimize the effect of temperature, supply voltage, and process variation. The BGVG is designed with proportional to absolute temperature (PTAT) characteristic, and a feedback amplifier is designed with weak-inversion transistors for low voltage operation. It is verified with a $0.18-{\mu}m$ CMOS process with five corners for MOS transistors and three corners for BJTs. The proposed circuit is superior to other reported current references under temperature variation from $-40^{\circ}C$ to $120^{\circ}C$ and power supply variation from 1.2 V to 1.8 V. The total power consumption is $126{\mu}W$ under the conditions that the power supply voltage is 1.2 V, the output current is $10{\mu}A$, and the operating temperature is $20^{\circ}C$.

Design of Temperature Stable Pulse Width Modulation Circuit Using CMOS Process Technology (CMOS 공정을 이용하는 동작온도에 무관한 펄스폭 변조회로 설계)

  • Kim, Do-Woo;Choi, Jin-Ho
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
    • /
    • 2007.11a
    • /
    • pp.186-187
    • /
    • 2007
  • In this work, a temperature stable PWM(Pulse width modulation) circuit is proposed. The designed PWM circuit has a temperature dependent current source and a temperature independent voltage to compensate electrical characteristics with operating temperature. The variation of driving current is from about 4% to -6% in the temperature range $0^{\circ}C\;to\;70^{\circ}C$ compared to the current at the room temperature. The variation of bandgap voltage reference is from about 1.3% to -0.2% with temperature when the supply voltage is 3.3 volts. From simulation results, the variation of output pulse width is less than from 0.86% to -0.38% in the temperature range $0^{\circ}C\;to\;70^{\circ}C$.

  • PDF

A Design of CMOS VCO Using Bandgap Voltage Reference (밴드갭 기준 전압을 이용한 CMOS 전압 제어 발진기의 설계)

  • 최진호
    • The Transactions of the Korean Institute of Electrical Engineers C
    • /
    • v.52 no.10
    • /
    • pp.425-430
    • /
    • 2003
  • A CMOS Voltage-Controlled Oscillator(VCO) for application at temperature stable system is designed. The VCO consists of bandgap voltage reference circuit, comparator, and voltage-to-current converter and the VCO has a temperature stable characteristics. The difference between simulated and calculated values is less than about 5% in output characteristics when the input voltage range is from 1V to 3.25V. The CMOS VCO has error less than about $\pm$0.85% in the temperature range from $-25^{\circ}C$ to $75^{\circ}C$.

A Clock and Data Recovery Circuit with Adaptive Loop Bandwidth Calibration and Idle Power Saved Frequency Acquisition

  • Lee, Won-Young;Jung, Chae Young;Cho, Ara
    • JSTS:Journal of Semiconductor Technology and Science
    • /
    • v.17 no.4
    • /
    • pp.568-576
    • /
    • 2017
  • This paper presents a clock and data recovery circuit with an adaptive loop bandwidth calibration scheme and the idle power saved frequency acquisition. The loop bandwidth calibration adaptively controls injection currents of the main loop with a trimmable bandgap reference circuit and trains the VCO to operate in the linear frequency control range. For stand-by power reduction of the phase detector, a clock gating circuit blocks 8-phase clock signals from the VCO and cuts off the current paths of current mode D-flip flops and latches during the frequency acquisition. 77.96% reduction has been accomplished in idle power consumption of the phase detector. In the jitter experiment, the proposed scheme reduces the jitter tolerance variation from 0.45-UI to 0.2-UI at 1-MHz as compared with the conventional circuit.

A CMOS Bandgap Reference Voltage Generator for a CMOS Active Pixel Sensor Imager

  • Kim, Kwang-Hyun;Cho, Gyu-Seong;Kim, Young-Hee
    • Transactions on Electrical and Electronic Materials
    • /
    • v.5 no.2
    • /
    • pp.71-75
    • /
    • 2004
  • This paper proposes a new bandgap reference (BGR) circuit which takes advantage of a cascode current mirror biasing to reduce the V$\_$ref/ variation, and sizing technique, which utilizes two related ratio numbers k and N, to reduce the PNP BJT area. The proposed BGR is designed and fabricated on a test chip with a goal to provide a reference voltage to the 10 bit A/D(4-4-4 pipeline architecture) converter of the CMOS Active Pixel Sensor (APS) imager to be used in X-ray imaging. The basic temperature variation effect on V$\_$ref/ of the BGR has a maximum delta of 6 mV over the temperature range of 25$^{\circ}C$ to 70$^{\circ}C$. To verify that the proposed BGR has radiation hardness for the X-ray imaging application, total ionization dose (TID) effect under Co-60 exposure conditions has been evaluated. The measured V$\_$ref/ variation under the radiation condition has a maximum delta of 33 mV over the range of 0 krad to 100 krad. For the given voltage, temperature, and radiation, the BGR has been satisfied well within the requirement of the target 10 bit A/D converter.

A Bandgap Reference Voltage Generator Design for Low Voltage SoC (저전압 SoC용 밴드갭 기준 전압 발생기 회로 설계)

  • Lee, Tae-Young;Lee, Jae-Hyung;Kim, Jong-Hee;Shim, Oe-Yong;Kim, Tae-Hoon;Park, Mu-Hun;Ha, Pan-Bong;Kim, Young-Hee
    • Journal of the Korea Institute of Information and Communication Engineering
    • /
    • v.12 no.1
    • /
    • pp.137-142
    • /
    • 2008
  • The band-gap reference voltage generator which can be operated by low voltage is proposed in this paper. The proposed BGR circuit can be realized in logic process by using parasitic NPN BJTs because a $Low-V_T$ transistors are not necessary. The proposed BGR circuit is designed and fabricated using $0.18{\mu}m$ triple-well process. The mean voltage of measured VREF is 0.72V and the three sigma$(3{\sigma})$ is 45.69mv.

Design of Low-Voltage Reference Voltage Generator for NVM IPs (NVM IP용 저전압 기준전압 회로 설계)

  • Kim, Meong-Seok;Jeong, Woo-Young;Park, Heon;Ha, Pan-Bong;Kim, Young-Hee
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
    • /
    • 2013.10a
    • /
    • pp.375-378
    • /
    • 2013
  • A reference voltage generator which is insensitive to PVT (process-voltage-temperature) variation necessary for NVM memory IPs such as EEPROM and MTP memories is designed in this paper. The designed BGR (bandgap reference voltage) circuit based on MagnaChip's $0.18{\mu}m$ EEPROM process uses a low-voltage bandgap reference voltage generator of cascode current-mirror type with a wide swing and shows a reference voltage characteristic insensitive to PVT variation. The minimum operating voltage is 1.43V and the VREF sensitivity against VDD variation is 0.064mV/V. Also, the VREF sensitivity against temperature variation is $20.5ppm/^{\circ}C$. The VREF voltage has a mean of 1.181V and its three sigma ($3{\sigma}$) value is 71.7mV.

  • PDF

Robust Start-up Circuit for Low Supply-voltage Reference Generator (저전압 기준전압 발생기를 위한 시동회로)

  • Im, Saemin;Park, Sang-Gyu
    • Journal of the Institute of Electronics and Information Engineers
    • /
    • v.52 no.2
    • /
    • pp.106-111
    • /
    • 2015
  • Since most reference voltage generator circuits have bi-stable characteristics, it is important to employ a proper start-up circuit to operate a reference generator in the desired state. In this paper, we propose a start-up circuit for a low voltage reference generator. This start-up circuit determines the state of the circuit reliably by measuring the current drawn by BJTs in the circuit, which is well-defined in the desired state. To measure the current using CMOS-compatible devices only, a comparator with an internal offset voltage is used. The reliability of the proposed circuit is confirmed by Monte-Carlo simulations of the start-up operation, which show that, with the proposed start-up circuit, the low voltage reference generator starts reliably with supply voltages over 850mV even in the presence of device mismatches.

A 70 MHz Temperature-Compensated On-Chip CMOS Relaxation Oscillator for Mobile Display Driver ICs

  • Chung, Kyunghoon;Hong, Seong-Kwan;Kwon, Oh-Kyong
    • JSTS:Journal of Semiconductor Technology and Science
    • /
    • v.16 no.6
    • /
    • pp.728-735
    • /
    • 2016
  • A 70 MHz temperature-compensated on-chip CMOS relaxation oscillator for mobile display driver ICs is proposed to reduce frequency variations. The proposed oscillator compensates for frequency variation with respect to temperature by adjusting the bias currents to control the change in delay of comparators with temperature. A bandgap reference (BGR) is used to stabilize the bias currents with respect to temperature and supply voltages. Additional temperature compensation for the generated frequency is achieved by optimizing the resistance in the BGR after measuring the output frequency. In addition, a trimming circuit is implemented to reduce frequency variation with respect to process. The proposed relaxation oscillator is fabricated using 45 nm CMOS technology and occupies an active area of $0.15mm^2$. The measured frequency variations with respect to temperature and supply voltages are as follows: (i) ${\pm}0.23%$ for changes in temperature from -30 to $75^{\circ}C$, (ii) ${\pm}0.14%$ for changes in $V_{DD1}$ from 2.2 to 2.8 V, and (iii) ${\pm}1.88%$ for changes in $V_{DD2}$ from 1.05 to 1.15 V.