• Title/Summary/Keyword: ball transfer

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Copper Interconnection and Flip Chip Packaging Laboratory Activity for Microelectronics Manufacturing Engineers

  • Moon, Dae-Ho;Ha, Tae-Min;Kim, Boom-Soo;Han, Seung-Soo;Hong, Sang-Jeen
    • Proceedings of the Korean Vacuum Society Conference
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    • 2012.02a
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    • pp.431-432
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    • 2012
  • In the era of 20 nm scaled semiconductor volume manufacturing, Microelectronics Manufacturing Engineering Education is presented in this paper. The purpose of microelectronic engineering education is to educate engineers to work in the semiconductor industry; it is therefore should be considered even before than technology development. Three Microelectronics Manufacturing Engineering related courses are introduced, and how undergraduate students acquired hands-on experience on Microelectronics fabrication and manufacturing. Conventionally employed wire bonding was recognized as not only an additional parasitic source in high-frequency mobile applications due to the increased inductance caused from the wiring loop, but also a huddle for minimizing IC packaging footprint. To alleviate the concerns, chip bumping technologies such as flip chip bumping and pillar bumping have been suggested as promising chip assembly methods to provide high-density interconnects and lower signal propagation delay [1,2]. Aluminum as metal interconnecting material over the decades in integrated circuits (ICs) manufacturing has been rapidly replaced with copper in majority IC products. A single copper metal layer with various test patterns of lines and vias and $400{\mu}m$ by $400{\mu}m$ interconnected pads are formed. Mask M1 allows metal interconnection patterns on 4" wafers with AZ1512 positive tone photoresist, and Cu/TiN/Ti layers are wet etched in two steps. We employed WPR, a thick patternable negative photoresist, manufactured by JSR Corp., which is specifically developed as dielectric material for multi- chip packaging (MCP) and package-on-package (PoP). Spin-coating at 1,000 rpm, i-line UV exposure, and 1 hour curing at $110^{\circ}C$ allows about $25{\mu}m$ thick passivation layer before performing wafer level soldering. Conventional Si3N4 passivation between Cu and WPR layer using plasma CVD can be an optional. To practice the board level flip chip assembly, individual students draw their own fan-outs of 40 rectangle pads using Eagle CAD, a free PCB artwork EDA. Individuals then transfer the test circuitry on a blank CCFL board followed by Cu etching and solder mask processes. Negative dry film resist (DFR), Accimage$^{(R)}$, manufactured by Kolon Industries, Inc., was used for solder resist for ball grid array (BGA). We demonstrated how Microelectronics Manufacturing Engineering education has been performed by presenting brief intermediate by-product from undergraduate and graduate students. Microelectronics Manufacturing Engineering, once again, is to educating engineers to actively work in the area of semiconductor manufacturing. Through one semester senior level hands-on laboratory course, participating students will have clearer understanding on microelectronics manufacturing and realized the importance of manufacturing yield in practice.

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A Study on Rail Vibration and Its Reduction Plan in Central Daejeon Area (대전 도심지역의 철도진동의 영향과 대책)

  • Ryu, Myoung-Ik;Suh, Man-Cheol;Lee, Won-Kook
    • Journal of the Korean Geophysical Society
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    • v.3 no.4
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    • pp.269-280
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    • 2000
  • Rail vibration in city zone is becoming a serious environmental problem. In order to make a reduction plan for rail vibration, the research was conducted in which many experiments to measure actual rail vibration along the railroad through the central Deajeon area. A digital vibration level meter was used to measure rail vibration. Vibration levels of Z-axis were measured at every second for the duration of the train passing. The measuring station was placed at every 5m for the distance of 55m. A total of 353 different sets of vibration level were obtained. The signals were processed to get $L_{10}$ value and analyzed in terms of distance, train velocity, and number of trains. As a result, it has been found that rail vibration exceed the allowable vibraton limit of 60 dB, at the point of 25 m far from the railroad center, which is regulated by the las of vibration and noise. Train velocity was found to affect a little for vibration level within the zone. It was also found that a trench installed along a railroad could reduce vibration level up to approximately 10 percent. A model test was conducted to investigate the influence of the location and size of trench, on the transfer of vibration. A heavy steel ball was used to generate vibrations. On the basis obtained from this study, it could be concluded that the application of distance-attenuation and the installment of a trench along railroad could be applied as a reduction plan for rail vibration. Because limitions might exist to depend on the effect of distance attenuation, trenchs excavated along a railroad might be suggested as the most efficient solution to reduce railroad vibration.

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