• Journal of the Korea Academia-Industrial cooperation Society
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• v.8 no.6
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• pp.1604-1612
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• 2007

For the latest 10 years, many companies have introduced the ERP system competitively. There have been many evaluations of the system, but most of them have made general evaluation and few of them studied output creation. The output of the introduction of the ERP system cannot be uniform, and the stages of output creation also vary. Accordingly, the present study purposed to examine when the management output of the ERP system is created in Korean companies that adopted the ERP system in order to predict the management output of such companies and to provide opportunities to change ERP operation methodology. Balanced scorecard was used as an indicator to measure the outcome of ERP. In addition, we conducted correlation analysis for determining the correlation between ERP system activation factors and management output, and performed frequency analysis to examine the stages of management output creation according to the stage of ERP system.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.18 no.11
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• pp.1262-1270
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• 2007

In this paper, we propose a new distortion cancellation mechanism for a balanced power amplifier structure using the carrier cancellation loop of a feedforward and post-distortion technique. The proposed cross post-distortion balanced linear amplifier can reduce nonlinear components as much as the conventional feedforward amplifier through the output dynamic range and broad bandwidth. Also the proposed system provides higher efficiency than the feedforward. The capacities of power amplifier and error power amplifier in the proposed system are analyzed and compared with those of feedforward amplifier. Also the operation mechanisms of the three kind loops are explained. The proposed cross post-distortion balanced linear power amplifier is implemented at the IMT-2000($f_0=2.14\;GHz$) band. With the commercial high power amplifiers of total power of 240 W peak envelope power fer base-station application, the adjacent channel leakage ratio measurement with wideband code division multiple access 4FA signal shows 18.6 dB improvement at an average output power of 40 dBm. The efficiency of fabricated amplifier Improves about 2 % than the conventional feedforward amplifier.

• Journal of Electrical Engineering and Technology
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• v.8 no.3
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• pp.610-612
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• 2013

A novel balanced distributed amplifier (DA) was proposed using novel impedance transforming MEMS baluns. The impedance transforming MEMS balun is matched to $50{\Omega}$ at one input port and $25{\Omega}$ at two output ports. It is based on the electric field mode-change method, thus it is strongly independent of frequency and very compact. The novel balanced DA consists of two $25{\Omega}$-matched DAs and these are combined by $50{\Omega}$-to-$25{\Omega}$ baluns. Theoretically, it has two times wider bandwidth and power capability than the conventional DA. So as to verify the proposed concept, we designed and fabricated a conventional DA and the proposed one using 0.15-${\mu}m$ GaAs pHEMT technology.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.23 no.5
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• pp.606-612
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• 2012

A highly efficient multi-mode balanced power amplifier(PA) structure is proposed for W-CDMA handset applications. The proposed PA has 2-stage amplifier configuration and the stage-bypass and load impedance switching techniques were applied to enhance power efficiency at medium power level as well as low output power level. Using the two techniques, four highly efficient power modes were realized. To demonstrate the usefulness of the proposed structure, a GaAs HBT balanced PA module was designed, fabricated, and measured.

• Journal of electromagnetic engineering and science
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• v.8 no.3
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• pp.91-95
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• 2008

This paper presents a direct-conversion I/Q up-mixer block, which supports $3{\sim}5$ GHz ultra-wideband(UWB) applications. It consists of a VI converter, a double-balanced mixer, a RF amplifier, and a differential-to-single signal converter. To achieve wideband characteristics over $3{\sim}5$ GHz frequency range, the double-balanced mixer adopts a shunt-peaking load. The proposed RF amplifier can suppress unwanted common-mode input signals with high linearity. The proposed direct-conversion I/Q up-mixer block is implemented using $0.18-{\mu}m$ CMOS technology. The measured results for three channels show a power gain of $-2{\sim}-9$ dB with a gain flatness of 1dB, a maximum output power level of $-7{\sim}-14.5$ dBm, and a output return loss of more than - 8.8 dB. The current consumption of the fabricated chip is 25.2 mA from a 1.8 V power supply.

• 한국정보통신설비학회:학술대회논문집
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• 2007.08a
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• pp.423-426
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• 2007

An active Balun is designed for RFID reader at 2.45GHz. The Balun is integrated inside the receiver, then the LNA and mixer can be connected. The unbalanced LNA output signal is transformed to a balanced signal at the input mixer The RF mixer and LO mixer, by using this balun. The Balun provided a balanced signal with two output stage, gain mismatch is 0.116dB. The phase show a good behavior with $163.918^{\circ}$,$-16.609^{\circ}$. The phase mismatch is about $0.527^{\circ}$. The tight difference between the gain and phase on each brancd, is because of the used capacitor and integrated inductor and the other parasitic element inside the balun.

• Proceedings of the Korea Electromagnetic Engineering Society Conference
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• 2003.11a
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• pp.326-329
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• 2003

In this paper, we designed and implemented a high power amplifier(HPA) to achieve the high Power Added Efficiency(PAE) over 40% at the 90W output power for the ISM-band(fo=2.45GHz). HPA presented in this paper has 3-stage drive amplifier and 1-stage final amplifier. In the final amplifier, we utilized balanced amplifier configuration with GaAs FET and each of two amplifiers has the push-pull configuration to increase PAE. From the measurement results, we obtained PAE of 42.95% at the 90.57W output power.

• Journal of Power Electronics
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• v.16 no.2
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• pp.447-454
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• 2016

A single-ended primary-inductor converter (SEPIC) features low input current ripple and output voltage up/down capability. However, the switching devices in a two-level SEPIC suffer from high voltage stresses and switching losses. To cope with this drawback, this study proposes a three-level SEPIC that uses a low voltage-rated switch and thus achieves better switching performance compared with the two-level SEPIC. The three-level SEPIC can reduce switch voltage stresses and switching losses. The converter operation and control method are described in this work. The experimental results for a 500 W prototype converter are also discussed. Experimental results show that unlike the two-level SEPIC, the three-level SEPIC achieves improved power efficiency with balanced capacitor voltages.

• Journal of the Optical Society of Korea
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• v.18 no.5
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• pp.466-471
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• 2014

An asynchronous optical packet-switching (AOPS) node with load-balancing capability can achieve better performance in reducing the high packet-loss ratio (PLR) and time delay caused by unbalanced traffic. This paper proposes a novel dynamic load-balancing algorithm for an AOPS node with limited buffer and without wavelength converters, and considering the data flow distribution and service levels. By calculating the occupancy state of the output ports, load state of the input ports, and priorities for data flow, the traffic is balanced accordingly. Simulations demonstrate that asynchronous variant data packets and output traffic can be automatically balanced according to service levels and the data flow distribution. A PLR of less than 0.01% can be achieved, as well as an average time delay of less than 0.46 ns.

• Proceedings of the KIPE Conference
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• 2018.07a
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• pp.114-116
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• 2018

This paper presents a control strategy to achieve the balanced sinusoidal output currents, as well as sinusoidal input currents for the matrix converter (MC) under unbalanced input voltages. By regulating the modulation index of the converter according to the instantaneous input voltages, the output currents are kept balanced and sinusoidal. In order to obtain sinusoidal input currents, the input power factor angle should be dynamically calculated based on the positive and negative sequence components of the input voltages. This paper proposes a simple method to construct the expected input power factor angle without the complicated sequence component extraction of input voltages. Simulation results are given to validate the effectiveness of the proposed control strategy.