• Proceedings of the Korean Society of Precision Engineering Conference
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• 2008.06a
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• pp.377-378
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• 2008

• Journal of the Korea Institute of Military Science and Technology
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• v.19 no.2
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• pp.155-162
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• 2016

TASS(Towed Array Sonar System) is a sonar system which tows the sensor array behind a platform. Array shape is generally assumed to be a straight line. But the array shape is often distorted by oceanic current or platform maneuvering which causes the performance loss of signal processing method like beamforming. So array shape estimation methods are needed. Typically the method based on Kalman filter using heading sensor is used. In practice, the measurement is corrupted by biases which are caused by rotation of the tow cable, varying magnetic fields and slowly varying stresses in the mechanical construction. Although they can't be calibrated but can be estimated. In this paper, we suggest the array shape estimation method based on Kalman filter compensating the sensor biases.

• Proceedings of the Acoustical Society of Korea Conference
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• 1998.06c
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• pp.487-490
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• 1998

본 논문에서는 천해 환경에서 multitone MFP를 하기 위한 다양한 시뮬레이션을 수행하고 여러 관점에서 multitone MFP의 성능을 분석하였다.

• The Transactions of the Korea Information Processing Society
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• v.2 no.6
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• pp.969-973
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• 1995

In this paper, a new parallel Multiplier array is proposed to reduce the multiplication time by modifying CAS(carry select adder) cell structure used in the conventional parallel multiplier array. It is named MCSA(modified CSA) that assignes the addend and augend to the inputs of CSA faster than Ci(carry input). Also the designed DCSA (doubled inverted input CSA) is appended after the last product term for the carry propagation adder. The proposed scheme is designed with MCSA and DCSA, and simulated. It is verified that the circuit size is increased about 13% compared with the conventional multiplier array with CSA cell but the operation time is reduced about 52%.

• Journal of the Korean Institute of Telematics and Electronics C
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• v.35C no.2
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• pp.29-35
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• 1998

This paper describes architectures and design of a SIMD type parallel image processing chip called SliM-II. The chiphas a linear array of 64 processing elements (PEs), operates at 30 MHz in the worst case simulation and gives at least 1.92 GIPS. In contrast to existing array processors, such as IMAP, MGAP-2, VIP, etc., each PE has a multiplier that is quite effective for convolution, template matching, etc. The instruction set can execute an ALU operation, data I/O, and inter-PE communication simulataneously in a single instruction cycle. In addition, during the ALU/multiplier operation, SliM-II provides parallel move between the register file and on-chip memory as in DSP chips, SliM-II can greatly reduce the inter-PE communication overhead, due to the idea a sliding, which is a technique of overlapping inter-PE communication with computation. Moreover, the bandwidth of data I/O and inter-PE communication increases due to bit-parallel data paths. We used the COMPASS$^{TM}$ 3.3 V 0.6.$\mu$m standrd cell library (v8r4.10). The total number of transistors is about 1.5 muillions, the core size is 13.2 * 13.0 mm$^{2}$ and the package type is 208 pin PQ2 (Power Quad 2). The performance evaluation shows that, compared to a existing array processors, a proposed architeture gives a significant improvement for algorithms requiring multiplications.s.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2001.05a
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• pp.265-268
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• 2001

In this paper, we designed one-dimensional VLSI array with high speed processing in Fractal image compression. fractal image compression algorithm partitions the original image into domain blocks and range blocks then compresses data using the self similarity of blocks. The image is partitioned into domain block with 50% overlapping. Domain block is reduced by averaging the original image to size of range block. VLSI array is trying to search the best matching between a range block and a large amount of domain blocks. Adjacent domain blocks are overlapped, so we can improve of each block's processing speed using the reuse of the overlapped data. In our experiment, proposed VLSI array has about 25% speed up by adding the least register, MUX, and DEMUX to the PE.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.32 no.8C
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• pp.745-757
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• 2007

In this paper, we propose a design of GPS anti-jamming system and its operational method, which can effectively suppress interference and jamming signals induced in GPS receiver. The 7-array antenna used in the proposed system is composed of conventional 6 equi-spaced circular elements with one element on the center of antenna and can be efficiently operated under power-constrained conditions. Futhermore, in this paper, we analyze the structure and complexity of STAP and SFAP which are well known techniques in adaptive array antenna signal processing, and we compare the BER performances between STAP and SFAP in various jamming environment based on the same complexity.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.57 no.12
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• pp.2300-2307
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• 2008

This study receives the noise transmitted in a constant audio frequency range through a microphone array in which the noise(like grease in a pan) occurs on the power supply line due to the troublesome partial discharge(arc). Then by going through a series of signal processing of removing noise, this study measures the distance and direction up to the noise caused by the troublesome partial discharge(arc) and monitors the result by displaying in the analog and digital method. After these, it determines the state of each size and judges the distance and direction of problematic part. When the signal sound transmitted by the signal source of bad insulator is received on each microphone, the signal comes only in the frequency range of 20 kHz by passing through the circuit of amplification and 6th low pass filter. Then, this signal is entered in a digital value of digital signal processing(TMS320F2812) through the 16-bit A/D conversion. By doing so, the sound distance, direction and coordinate of bad insulator can be detected by realizing the correlation method of detecting the arriving time difference occurring on each microphone and the algorithm of detecting maximum time difference.

• Proceedings of the Korean Society for Noise and Vibration Engineering Conference
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• 2008.11a
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• pp.699-704
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• 2008

This paper describes a general approach for processing data from an omni-directional guided wave transducer array for the rapid inspection of large plate structures. A basic phased array algorithm is presented that can be applied to any array Geometry. For guided waves on plate, beam steering algorithm is derived and the corresponding beam pattern is analyzed. The algorithms are applied to simulation and experimental data. The results show well its usefulness in structural applications.

• Transactions of Materials Processing
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• v.7 no.2
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• pp.127-138
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• 1998

Process design of multi-step wire drawing process, conducted by means of finite element analysis and ANN(Artificial Neural Network) has been considered. The investigated problem involves the ade-quate selection of the drawing die angle and the correspondent reduction rate in the condition of desired initial and final diameter. Combinations of the process parameters which are used in finite ele-ment simulation are selected by using the orthogonal array. Also the orthogonal array. Also the orthogonal array and the results of finite element simulation which are related to the process energy are used as train data of ANN. In this study it is shown that the application of new technique using ANN and Othogonal array table to the process design of metal forming process is useful method.